Check that RV32 and RV64 read back the implemented mode after writing reserved mode bits, then execute cm.jt through the table.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4408 Signed-off-by: wangyang <[email protected]> --- tests/tcg/riscv32/system/meson.build | 9 +++++ tests/tcg/riscv32/test-jvt-warl.S | 49 ++++++++++++++++++++++++++++ tests/tcg/riscv64/system/meson.build | 7 ++++ tests/tcg/riscv64/test-jvt-warl.S | 49 ++++++++++++++++++++++++++++ 4 files changed, 114 insertions(+) create mode 100644 tests/tcg/riscv32/test-jvt-warl.S create mode 100644 tests/tcg/riscv64/test-jvt-warl.S diff --git a/tests/tcg/riscv32/system/meson.build b/tests/tcg/riscv32/system/meson.build index f8e55ad3d4..31c285c6f6 100644 --- a/tests/tcg/riscv32/system/meson.build +++ b/tests/tcg/riscv32/system/meson.build @@ -22,6 +22,15 @@ tests += { }, } +tests += { + 'test-jvt-warl.S': { + 'cflags': cflags, + 'qemu_args': [ + '-cpu', 'rv32i,h=false,zcd=false,zca=true,zcmt=true,zicsr=true', qemu_args, + ], + }, +} + if 'qemu-system-riscv32' in emulators tcg_tests += { 'riscv32-softmmu': { diff --git a/tests/tcg/riscv32/test-jvt-warl.S b/tests/tcg/riscv32/test-jvt-warl.S new file mode 100644 index 0000000000..b9e42bc7a0 --- /dev/null +++ b/tests/tcg/riscv32/test-jvt-warl.S @@ -0,0 +1,49 @@ +/* + * Verify jvt.mode WARL normalization and cm.jt dispatch. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + .option norvc + .text + .global _start +_start: + lla t0, trap + csrw mtvec, t0 + lla t0, jvt_table + ori t1, t0, 0x3f + csrw 0x017, t1 + csrr t2, 0x017 + bne t0, t2, fail + .2byte 0xa002 /* cm.jt index 0 */ + +fail: + li a0, 1 + j _exit + +target: + li a0, 0 + +_exit: + lla a1, semiargs + li t0, 0x20026 /* ADP_Stopped_ApplicationExit */ + sw t0, 0(a1) + sw a0, 4(a1) + li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */ + .balign 16 + slli zero, zero, 0x1f + ebreak + srai zero, zero, 0x7 + j . + +trap: + li a0, 1 + j _exit + + .balign 64 +jvt_table: + .word target + + .data + .balign 8 +semiargs: + .space 8 diff --git a/tests/tcg/riscv64/system/meson.build b/tests/tcg/riscv64/system/meson.build index 3e1c970382..ce5e710288 100644 --- a/tests/tcg/riscv64/system/meson.build +++ b/tests/tcg/riscv64/system/meson.build @@ -77,6 +77,13 @@ tests += { } } +tests += { + 'test-jvt-warl.S': { + 'cflags': cflags + ['-march=rv64gc_zicsr'], + 'qemu_args': ['-cpu', 'rv64,zcmt=true,zcd=false', qemu_args], + } +} + if 'qemu-system-riscv64' in emulators tcg_tests += { 'riscv64-softmmu': { diff --git a/tests/tcg/riscv64/test-jvt-warl.S b/tests/tcg/riscv64/test-jvt-warl.S new file mode 100644 index 0000000000..2ac28e6951 --- /dev/null +++ b/tests/tcg/riscv64/test-jvt-warl.S @@ -0,0 +1,49 @@ +/* + * Verify jvt.mode WARL normalization and cm.jt dispatch. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + + .option norvc + .text + .global _start +_start: + lla t0, trap + csrw mtvec, t0 + lla t0, jvt_table + ori t1, t0, 0x3f + csrw 0x017, t1 + csrr t2, 0x017 + bne t0, t2, fail + .2byte 0xa002 /* cm.jt index 0 */ + +fail: + li a0, 1 + j _exit + +target: + li a0, 0 + +_exit: + lla a1, semiargs + li t0, 0x20026 /* ADP_Stopped_ApplicationExit */ + sd t0, 0(a1) + sd a0, 8(a1) + li a0, 0x20 /* TARGET_SYS_EXIT_EXTENDED */ + .balign 16 + slli zero, zero, 0x1f + ebreak + srai zero, zero, 0x7 + j . + +trap: + li a0, 1 + j _exit + + .balign 64 +jvt_table: + .dword target + + .data + .balign 16 +semiargs: + .space 16 -- 2.55.0.windows.2
