From: Jinjie Ruan <[email protected]> Add read/write handling for the error report surface as plain per-RIS storage: MPAMF_ECR (INTEN write mask), MPAMF_ESR and the ERR_MSI configuration block. Error recording semantics, the MSC- global ESR view and the interrupt outputs arrive with the error reporting patches.
Signed-off-by: Jinjie Ruan <[email protected]> --- hw/arm/mpam.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/hw/arm/mpam.c b/hw/arm/mpam.c index fafe74f..441356e 100644 --- a/hw/arm/mpam.c +++ b/hw/arm/mpam.c @@ -388,6 +388,20 @@ static uint64_t mpam_msc_read_reg(void *opaque, hwaddr offset, return mpamf->csumon_idr; case A_MPAMF_MBWUMON_IDR: return mpamf->mbwumon_idr; + case A_MPAMF_ERR_MSI_MPAM: + return mpamf->err_msi_mpam; + case A_MPAMF_ERR_MSI_ADDR_L: + return mpamf->err_msi_addr_l; + case A_MPAMF_ERR_MSI_ADDR_H: + return mpamf->err_msi_addr_h; + case A_MPAMF_ERR_MSI_DATA: + return mpamf->err_msi_data; + case A_MPAMF_ERR_MSI_ATTR: + return mpamf->err_msi_attr; + case A_MPAMF_ECR: + return mpamf->ecr; + case A_MPAMF_ESR: + return mpamf->esr; case A_MPAMF_CFG_PART_SEL: return mpamf->cfg_part_sel; case A_MPAMF_MPAMCFG_CMAX: @@ -555,6 +569,14 @@ static void mpam_msc_write_reg(void *opaque, hwaddr offset, uint64_t value, mpamf->per_nrw_id[nrw_part_sel].cfg_mbw_pbm[array_offset] = value; return; } + case A_MPAMF_ECR: + if (value & ~MPAMF_ECR_WRITE_MASK) { + qemu_log_mask(LOG_UNIMP, + "MPAM: Unexpected write to ECR Mask=%x Value=%lx\n", + MPAMF_ECR_WRITE_MASK, value); + } + mpamf->ecr = value; + return; default: qemu_log_mask(LOG_UNIMP, "MPAM: Write to unexpected register Addr %lx Value=%lx\n", -- 2.43.0
