Probe for the SBI STA extension by searching for a one-reg id built from KVM_REG_RISCV_SBI_EXT and KVM_RISCV_SBI_EXT_STA in the register list returned by KVM, following the existing SBI DBCN pattern, and record the result in kvm_sbi_sta.supported.
This patch only adds capability detection; nothing consumes kvm_sbi_sta.supported yet. The register synchronization that uses it is added by a subsequent patch. Signed-off-by: Wang Yechao <[email protected]> --- target/riscv/kvm/kvm-cpu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index c085b22b23..8ab43432dd 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -473,6 +473,12 @@ static KVMCPUConfig kvm_sbi_dbcn = { KVM_REG_RISCV_SBI_EXT | KVM_RISCV_SBI_EXT_DBCN }; +static KVMCPUConfig kvm_sbi_sta = { + .name = "sbi_sta", + .kvm_reg_id = KVM_REG_RISCV | KVM_REG_SIZE_U64 | + KVM_REG_RISCV_SBI_EXT | KVM_RISCV_SBI_EXT_STA +}; + static void kvm_riscv_update_cpu_cfg_isa_ext(RISCVCPU *cpu, CPUState *cs) { uint64_t id, reg; @@ -1233,6 +1239,19 @@ static void kvm_riscv_check_sbi_dbcn_support(RISCVCPU *cpu, } } +static void kvm_riscv_check_sbi_sta_support(RISCVCPU *cpu, + struct kvm_reg_list *reglist) +{ + struct kvm_reg_list *reg_search; + + reg_search = bsearch(&kvm_sbi_sta.kvm_reg_id, reglist->reg, reglist->n, + sizeof(uint64_t), uint64_cmp); + + if (reg_search) { + kvm_sbi_sta.supported = true; + } +} + static void kvm_riscv_read_vlenb(RISCVCPU *cpu, KVMScratchCPU *kvmcpu, struct kvm_reg_list *reglist) { @@ -1365,6 +1384,7 @@ static void kvm_riscv_init_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu) } kvm_riscv_check_sbi_dbcn_support(cpu, reglist); + kvm_riscv_check_sbi_sta_support(cpu, reglist); kvm_riscv_read_csr_cfg(reglist); } -- 2.27.0
