Move PCSouthBridgeOption from a hand-rolled C enum to a proper QAPI enum in qapi/machine.json.
This gives the x-south-bridge property a generated type_info with a valid masked_name, so it appears in query-qmp-schema introspection and the qapi-type field of qom-list-properties output. The south_bridge/default_south_bridge fields change from const char * to PCSouthBridgeOption, with an explicit mapping table from enum value to QOM device type name. Enum values are changed: "PIIX3"->"ppix3", "piix4-isa"->"piix4", this is under a x-property, so shouldn't be a breaking change. Signed-off-by: Markus Armbruster <[email protected]> Signed-off-by: Marc-André Lureau <[email protected]> --- hw/i386/pc_piix.c | 61 ++++++++++++++++------------------------------------ include/hw/i386/pc.h | 4 ++-- qapi/machine.json | 14 ++++++++++++ 3 files changed, 34 insertions(+), 45 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 63c4667ea372..5a94a34166d8 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -47,6 +47,7 @@ #include "hw/acpi/acpi.h" #include "hw/vfio/types.h" #include "qapi/error.h" +#include "qapi/qapi-type-infos-machine.h" #include "qemu/error-report.h" #include "system/xen.h" #ifdef CONFIG_XEN @@ -75,6 +76,11 @@ static GlobalProperty pc_piix_compat_defaults[] = { static const size_t pc_piix_compat_defaults_len = G_N_ELEMENTS(pc_piix_compat_defaults); +static const char *pc_south_bridge_type[] = { + [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, + [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, +}; + /* * Return the global irq number corresponding to a given device irq * pin. We could also use the bus number to have a more precise mapping. @@ -236,7 +242,8 @@ static void pc_init1(MachineState *machine, const char *pci_type) gsi_state = pc_gsi_create(&x86ms->gsi, true); - pci_dev = pci_new_multifunction(-1, pcms->south_bridge); + pci_dev = pci_new_multifunction(-1, + pc_south_bridge_type[pcms->south_bridge]); object_property_set_bool(OBJECT(pci_dev), "has-usb", machine_usb(machine), &error_abort); object_property_set_bool(OBJECT(pci_dev), "has-acpi", @@ -317,51 +324,18 @@ static void pc_init1(MachineState *machine, const char *pci_type) } } -typedef enum PCSouthBridgeOption { - PC_SOUTH_BRIDGE_OPTION_PIIX3, - PC_SOUTH_BRIDGE_OPTION_PIIX4, - PC_SOUTH_BRIDGE_OPTION_MAX, -} PCSouthBridgeOption; - -static const QEnumLookup PCSouthBridgeOption_lookup = { - .array = (const char *const[]) { - [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE, - [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE, - }, - .size = PC_SOUTH_BRIDGE_OPTION_MAX -}; - static int pc_get_south_bridge(Object *obj, Error **errp) { PCMachineState *pcms = PC_MACHINE(obj); - int i; - for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) { - if (g_strcmp0(PCSouthBridgeOption_lookup.array[i], - pcms->south_bridge) == 0) { - return i; - } - } - - error_setg(errp, "Invalid south bridge value set"); - return 0; + return pcms->south_bridge; } static void pc_set_south_bridge(Object *obj, int value, Error **errp) { PCMachineState *pcms = PC_MACHINE(obj); - if (value < 0) { - error_setg(errp, "Value can't be negative"); - return; - } - - if (value >= PCSouthBridgeOption_lookup.size) { - error_setg(errp, "Value too big"); - return; - } - - pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; + pcms->south_bridge = value; } #ifdef CONFIG_XEN @@ -398,7 +372,7 @@ static void pc_i440fx_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); ObjectClass *oc = OBJECT_CLASS(m); - pcmc->default_south_bridge = TYPE_PIIX3_DEVICE; + pcmc->default_south_bridge = PC_SOUTH_BRIDGE_OPTION_PIIX3; pcmc->pci_root_uid = 0; pcmc->default_cpu_version = 1; @@ -413,12 +387,13 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); machine_class_allow_dynamic_sysbus_dev(m, TYPE_UEFI_VARS_X64); - object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption", - &PCSouthBridgeOption_lookup, - pc_get_south_bridge, - pc_set_south_bridge); - object_class_property_set_description(oc, "x-south-bridge", - "Use a different south bridge than PIIX3"); + object_class_property_add_qapi_enum(oc, QAPI_ENUM_PROP( + .name = "x-south-bridge", + .description = "Use a different south bridge than PIIX3", + .qapi_type = &PCSouthBridgeOption_type_info, + .get = pc_get_south_bridge, + .set = pc_set_south_bridge, + )); compat_props_add(m->compat_props, pc_piix_compat_defaults, pc_piix_compat_defaults_len); } diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 8edec62a1af2..3afd376116b1 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -47,7 +47,7 @@ typedef struct PCMachineState { uint64_t max_ram_below_4g; OnOffAuto vmport; SmbiosEntryPointType smbios_entry_point_type; - const char *south_bridge; + PCSouthBridgeOption south_bridge; bool acpi_build_enabled; bool wdat_enabled; @@ -94,7 +94,7 @@ struct PCMachineClass { /* Device configuration: */ bool pci_enabled; - const char *default_south_bridge; + PCSouthBridgeOption default_south_bridge; /* Compat options: */ diff --git a/qapi/machine.json b/qapi/machine.json index 46b6935ab0b8..cc028e890ae5 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -462,6 +462,20 @@ { 'enum': 'Pca9554PinState', 'data': ['low', 'high'] } +## +# @PCSouthBridgeOption: +# +# South bridge chipset option for PC i440FX machines. +# +# @piix3: Intel PIIX3 (default) +# +# @piix4: Intel PIIX4 +# +# Since: 11.2 +## +{ 'enum': 'PCSouthBridgeOption', + 'data': ['piix3', 'piix4'] } + ## # @inject-nmi: # Injects a Non-Maskable Interrupt (machine specific: for example -- 2.56.0.116.g6de20f6092dc
