> On 20. Oct 2026, at 16:20, Alex Bennée <[email protected]> wrote: > > Demi Marie Obenour <[email protected]> writes: > >> On 10/7/26 12:29, Alex Bennée wrote: > > (CC trimmed, IOMMU relevant maintainers added) > >>> >>> Hi, >>> >>> The KVM/QEMU community call is at: >>> > <snip> >> >> Is this also for topics related to KVM but not necessarily QEMU? >> If so, and if there will be people who are familiar with device >> passthrough, I'd like to discuss whether IOMMU faults and KVM MMU >> faults are recoverable. There is a virtio device I am working on >> which requires this to avoid either crashing the guest or allowing >> the guest to hog host memory. > > We didn't get to this at the last community call. Is this something that > can be discussed on list first?
It should be I think. Hi, For such a virtio device (and granularly exposing it to user contexts too), is ATS + PRI a good choice? Perhaps even using the host page tables directly, with a per-process abstraction as the security boundary. On physical hardware as intended, outside of the ATS + PRI case, IOMMU faults are expected to be something requiring a device/driver reset. On Arm however, there’s an exception for the stall model, which pre-dates ATS + PRI. A PRI PPR reply of not present isn’t equivalent to an IOMMU fault and isn’t expected to result in a crash resulting in a device reset. > > -- > Alex Bennée > Virtualisation Tech Lead @ Linaro >
