Factor hppa_exception_name() out of hppa_cpu_do_interrupt() and register it as the CPUClass::exception_name() handler, so the common exception logging can resolve HPPA exception codes to names.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Pierrick Bouvier <[email protected]> --- target/hppa/cpu.h | 2 + target/hppa/cpu.c | 1 + target/hppa/int_helper.c | 88 ++++++++++++++++++++-------------------- 3 files changed, 46 insertions(+), 45 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index f453444d7f9..3914b3285c5 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -98,6 +98,8 @@ /* Emulated hardware TOC button */ #define EXCP_TOC 32 /* TOC = Transfer of control (NMI) */ +const char *hppa_exception_name(int excp); + #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 /* TOC */ /* Taken from Linux kernel: arch/parisc/include/asm/psw.h */ diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 07b49e51326..81eef6a2fc7 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -305,6 +305,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, const void *data) &acc->parent_phases); cc->class_by_name = hppa_cpu_class_by_name; + cc->exception_name = hppa_exception_name; cc->dump_state = hppa_cpu_dump_state; cc->set_pc = hppa_cpu_set_pc; cc->get_pc = hppa_cpu_get_pc; diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index 3e87b9a0011..e4297461d55 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -90,6 +90,46 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val) bql_unlock(); } +const char *hppa_exception_name(int excp) +{ + static const char * const excp_names[] = { + [EXCP_HPMC] = "high priority machine check", + [EXCP_POWER_FAIL] = "power fail interrupt", + [EXCP_RC] = "recovery counter trap", + [EXCP_EXT_INTERRUPT] = "external interrupt", + [EXCP_LPMC] = "low priority machine check", + [EXCP_ITLB_MISS] = "instruction tlb miss fault", + [EXCP_IMP] = "instruction memory protection trap", + [EXCP_ILL] = "illegal instruction trap", + [EXCP_BREAK] = "break instruction trap", + [EXCP_PRIV_OPR] = "privileged operation trap", + [EXCP_PRIV_REG] = "privileged register trap", + [EXCP_OVERFLOW] = "overflow trap", + [EXCP_COND] = "conditional trap", + [EXCP_ASSIST] = "assist exception trap", + [EXCP_DTLB_MISS] = "data tlb miss fault", + [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", + [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", + [EXCP_DMP] = "data memory protection trap", + [EXCP_DMB] = "data memory break trap", + [EXCP_TLB_DIRTY] = "tlb dirty bit trap", + [EXCP_PAGE_REF] = "page reference trap", + [EXCP_ASSIST_EMU] = "assist emulation trap", + [EXCP_HPT] = "high-privilege transfer trap", + [EXCP_LPT] = "low-privilege transfer trap", + [EXCP_TB] = "taken branch trap", + [EXCP_DMAR] = "data memory access rights trap", + [EXCP_DMPI] = "data memory protection id trap", + [EXCP_UNALIGN] = "unaligned data reference trap", + [EXCP_PER_INTERRUPT] = "performance monitor interrupt", + [EXCP_SYSCALL] = "syscall", + [EXCP_SYSCALL_LWS] = "syscall-lws", + [EXCP_TOC] = "TOC (transfer of control)", + }; + + return ARRAY_ELEM_OR_NULL(excp_names, excp) ?: "unknown"; +} + void hppa_cpu_do_interrupt(CPUState *cs) { HPPACPU *cpu = HPPA_CPU(cs); @@ -235,53 +275,11 @@ void hppa_cpu_do_interrupt(CPUState *cs) } if (qemu_loglevel_mask(CPU_LOG_INT)) { - static const char * const names[] = { - [EXCP_HPMC] = "high priority machine check", - [EXCP_POWER_FAIL] = "power fail interrupt", - [EXCP_RC] = "recovery counter trap", - [EXCP_EXT_INTERRUPT] = "external interrupt", - [EXCP_LPMC] = "low priority machine check", - [EXCP_ITLB_MISS] = "instruction tlb miss fault", - [EXCP_IMP] = "instruction memory protection trap", - [EXCP_ILL] = "illegal instruction trap", - [EXCP_BREAK] = "break instruction trap", - [EXCP_PRIV_OPR] = "privileged operation trap", - [EXCP_PRIV_REG] = "privileged register trap", - [EXCP_OVERFLOW] = "overflow trap", - [EXCP_COND] = "conditional trap", - [EXCP_ASSIST] = "assist exception trap", - [EXCP_DTLB_MISS] = "data tlb miss fault", - [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", - [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", - [EXCP_DMP] = "data memory protection trap", - [EXCP_DMB] = "data memory break trap", - [EXCP_TLB_DIRTY] = "tlb dirty bit trap", - [EXCP_PAGE_REF] = "page reference trap", - [EXCP_ASSIST_EMU] = "assist emulation trap", - [EXCP_HPT] = "high-privilege transfer trap", - [EXCP_LPT] = "low-privilege transfer trap", - [EXCP_TB] = "taken branch trap", - [EXCP_DMAR] = "data memory access rights trap", - [EXCP_DMPI] = "data memory protection id trap", - [EXCP_UNALIGN] = "unaligned data reference trap", - [EXCP_PER_INTERRUPT] = "performance monitor interrupt", - [EXCP_SYSCALL] = "syscall", - [EXCP_SYSCALL_LWS] = "syscall-lws", - [EXCP_TOC] = "TOC (transfer of control)", - }; - FILE *logfile = qemu_log_trylock(); if (logfile) { - const char *name = NULL; - - if (i >= 0 && i < ARRAY_SIZE(names)) { - name = names[i]; - } - if (name) { - fprintf(logfile, "INT: cpu %d %s\n", cs->cpu_index, name); - } else { - fprintf(logfile, "INT: cpu %d unknown %d\n", cs->cpu_index, i); - } + const char *name = hppa_exception_name(i); + fprintf(logfile, "INT: cpu %d excp %d (%s)\n", + cs->cpu_index, i, name); hppa_cpu_dump_state(cs, logfile, 0); qemu_log_unlock(logfile); } -- 2.55.0
