Add a "crypto" feature bit gating the OSA 2011 cryptographic instructions (AES, SHA-1/256/512, CRC32C, CFR in ASR 26). Off by default; no CPU model enables it yet; can be set explicitly with "-cpu ...,+crypto". SPARC64 only.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Stian Halseth <[email protected]> --- target/sparc/cpu-feature.h.inc | 1 + target/sparc/cpu.c | 3 +++ target/sparc/translate.c | 2 ++ 3 files changed, 6 insertions(+) diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index be81005237..4a32f49de4 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -16,3 +16,4 @@ FEATURE(FMAF) FEATURE(VIS3) FEATURE(IMA) FEATURE(VIS4) +FEATURE(CRYPTO) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index ae9bdca9df..528a9d2bd8 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -560,6 +560,7 @@ static const char * const feature_name[] = { [CPU_FEATURE_BIT_VIS3] = "vis3", [CPU_FEATURE_BIT_IMA] = "ima", [CPU_FEATURE_BIT_VIS4] = "vis4", + [CPU_FEATURE_BIT_CRYPTO] = "crypto", #else [CPU_FEATURE_BIT_MUL] = "mul", [CPU_FEATURE_BIT_DIV] = "div", @@ -977,6 +978,8 @@ static const Property sparc_cpu_properties[] = { CPU_FEATURE_BIT_IMA, false), DEFINE_PROP_BIT("vis4", SPARCCPU, env.def.features, CPU_FEATURE_BIT_VIS4, false), + DEFINE_PROP_BIT("crypto", SPARCCPU, env.def.features, + CPU_FEATURE_BIT_CRYPTO, false), #else DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, CPU_FEATURE_BIT_MUL, false), diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 3156be6a94..b93feb074b 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2507,6 +2507,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3) # define avail_VIS3B(C) avail_VIS3(C) # define avail_VIS4(C) ((C)->def->features & CPU_FEATURE_VIS4) +# define avail_CRYPTO(C) ((C)->def->features & CPU_FEATURE_CRYPTO) #else # define avail_32(C) true # define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17) @@ -2524,6 +2525,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS3(C) false # define avail_VIS3B(C) false # define avail_VIS4(C) false +# define avail_CRYPTO(C) false #endif /* base-commit: 11661d857254b27fca5568c6deacf4f6b6f3460f -- 2.43.0
