On 9/14/26 18:00, Peter Maydell wrote:
When the guest writes to IRS_IST_BASER we effectively cache the value of the VALID bit in the GICv5ISTConfig valid field entry. In a few places we check whether the IST is valid by doing a bit extract on the register value; switch those to look at cfg->structure instead.Signed-off-by: Peter Maydell<[email protected]> --- hw/intc/arm_gicv5.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <[email protected]> r~
