On Wed, Aug 26, 2026 at 04:48:34PM +0800, Ewan Hai-oc wrote: > Add CPU models for the Zhaoxin Shijidadao server (v1) and client (v2), > including their cache topology. The matching KVM support for SM2, CCS, > RNG2, PHE2 and RSA is queued in the KVM next branch. > > The series also adds YongFeng-v4 with the same five feature pairs. > > TCG does not currently implement these instructions. TCG_EXT4_FEATURES > remains zero, so QEMU filters the new bits from realized TCG CPUs. > > The Shijidadao models expose CPUID leaf 0x1f. A related fix for invalid > subleaf handling under TCG is available here: > https://lore.kernel.org/qemu-devel/[email protected]/ > > Changes since v3: > - Rebased to the 11.2 development tree. > - Added QEMU definitions for the five feature pairs now available > through KVM. > - Enabled the new CPUID 0xC0000001 EDX feature pairs in the Shijidadao > models and adjusted the server and client feature sets to match their > respective silicon. > - Added YongFeng-v4 with the same feature set. > > v3: > https://lore.kernel.org/all/[email protected]/ > > KVM feature series: > https://lore.kernel.org/all/[email protected]/ > > Ewan Hai (4): > target/i386: Add cache model for Zhaoxin Shijidadao vCPUs > target/i386: Add Zhaoxin cryptographic CPUID features > target/i386: Introduce Zhaoxin Shijidadao CPU model > target/i386: Enable new cryptographic features in YongFeng-v4 > > target/i386/cpu.c | 284 ++++++++++++++++++++++++++++++++++++++++++++-- > target/i386/cpu.h | 20 ++++ > 2 files changed, 295 insertions(+), 9 deletions(-) > > -- > 2.34.1
Hi Paolo, Ping on this series. All four patches have Zhao's Reviewed-by, and I've checked that the series still applies cleanly to current master. Could you please pick this up, or let me know if anything else is needed? https://lore.kernel.org/all/[email protected]/ Thanks, Ewan
