v2: Dropped alpha FPCR exception status fixes for IEEE-mode code The following changes since commit ab5b7ba3794a016663c7200a92045fcca3ed7f1e:
Merge tag 'pull-loongarch-20261023' of https://github.com/bibo-mao/qemu into staging (2026-10-23 11:45:20 +0200) are available in the Git repository at: https://github.com/philmd/qemu.git tags/target-misc-20261024 for you to fetch changes up to ee7963229f6627ebed1b26b8290380026b0ca4b4: MAINTAINERS: cover riscv GDB XML files (2026-10-24 11:48:48 +0200) ---------------------------------------------------------------- Misc target patches queue - Make TCG halt-to-exec transition explicit and remove cpu_exec_halt() - Various conversions to translate_for_debug() - Add common CPUClass::exception_name() handler - multi-target: prefix helpers with target prefix - Remove target_long_bits() from GDB register reads - MAINTAINERS updates ---------------------------------------------------------------- Marc-André Lureau (3): MAINTAINERS: cover m68k GDB XML files MAINTAINERS: cover x86 GDB XML files MAINTAINERS: cover riscv GDB XML files Peter Maydell (10): target/alpha: Convert to translate_for_debug target/avr: Convert to translate_for_debug target/or1k: Convert to translate_for_debug target/rx: Convert to translate_for_debug target/tricore: Convert to translate_for_debug target/hexagon: Convert to translate_for_debug target/hppa: Convert to translate_for_debug target/loongarch: Convert to translate_for_debug target/m68k: Convert to translate_for_debug target/mips: Convert to translate_for_debug Philippe Mathieu-Daudé (50): accel/tcg: Refactor poll-while-halted flow in cpu_exec() accel/tcg: Introduce poll_during_halt() and leaving_halt() target/arm: Split leaving-halt handling from arm_cpu_exec_halt() target/arm: Convert cpu_exec_halt() to leaving_halt() target/i386: Split APIC polling from x86_cpu_exec_halt() target/i386: Split leaving-halt handling from x86_cpu_exec_halt() target/i386: Use generic halt transition handlers accel/tcg: Remove the redundant cpu_exec_halt() hook target/sparc/gdbstub: Replace gdb_get_regl() by gdb_get_reg64() target/mips/gdbstub: Reduce to a single gdb_get_regl() call target/mips/gdbstub: Replace target_long_bits() by mips_env_is_64bit() target/ppc: Factor ppc_env_is_64bit() out target/ppc/gdbstub: Replace target_long_bits() by ppc_env_is_64bit() target/ppc/gdbstub: Replace gdb_get_regl() by ppc_env_is_64bit() target/riscv: Factor riscv_gdb_get_reg_mxl() out target/riscv: Replace gdb_get_regl() by riscv_gdb_get_reg_mxl() target/hexagon: Expand gdb_get_regl() -> gdb_get_reg32() again gdbstub: Remove unused gdb_get_regl() include: Remove TARGET_LONG_SIZE definition qemu/osdep: Document ARRAY_SIZE() macro rejects pointers util/cutils: Add STR_ARRAY_ELEM_OR_NULL() for string table lookups cpus: Add helper to log raised exceptions with '-d int' cpus: Introduce CPUClass::exception_name() handler target/alpha: Register CPUClass::exception_name() handler target/alpha: Use a static table in alpha_exception_name() target/arm: Register CPUClass::exception_name() handler target/avr: Implement and register CPUClass::exception_name() target/hexagon: Register CPUClass::exception_name() handler target/hppa: Register CPUClass::exception_name() handler target/i386: Replace magic value by proper EXCP0E_PAGE definition target/i386: Implement and register CPUClass::exception_name() target/loongarch: Register CPUClass::exception_name() handler target/m68k: Register CPUClass::exception_name() handler target/m68k: Use a static table in m68k_exception_name() target/microblaze: Implement and register CPUClass::exception_name() target/mips: Remove EXCP_LAST, use ARRAY_SIZE(excp_names) target/mips: Register CPUClass::exception_name() handler target/or1k: Register CPUClass::exception_name() handler target/ppc: Name the EBB exceptions target/ppc: Use a static table in powerpc_excp_name() target/ppc: Register CPUClass::exception_name() handler target/riscv: Register CPUClass::exception_name() handler target/rx: Unify BRK and INT trap handling target/rx: Register CPUClass::exception_name() handler target/s390x: Implement and register CPUClass::exception_name() target/sh4: Register CPUClass::exception_name() handler target/sh4: Use a static table in sh4_exception_name() target/sparc: Remove always-defined DEBUG_PCALL target/sparc: Register CPUClass::exception_name() handler target/xtensa: Implement and register CPUClass::exception_name() Pierrick Bouvier (16): target/alpha: define and call helpers using HELPER macro target/arm: define and call helpers using HELPER macro target/avr: define and call helpers using HELPER macro target/hppa: define and call helpers using HELPER macro target/i386: define and call helpers using HELPER macro target/loongarch: define and call helpers using HELPER macro target/m68k: define and call helpers using HELPER macro target/microblaze: define and call helpers using HELPER macro target/mips: define and call helpers using HELPER macro target/or1k: define and call helpers using HELPER macro target/ppc: define and call helpers using HELPER macro target/riscv: define and call helpers using HELPER macro target/s390x: define and call helpers using HELPER macro target/sh4: define and call helpers using HELPER macro target/sparc: define and call helpers using HELPER macro target/tricore: define and call helpers using HELPER macro Yonggang Luo (2): target/rx: Define exception vector constants target/sh4: Define exception vector constants MAINTAINERS | 4 + include/accel/tcg/cpu-ops.h | 36 +- include/exec/target_long.h | 8 +- include/gdbstub/helpers.h | 18 - include/hw/core/cpu.h | 2 + include/qemu/cutils.h | 17 + include/qemu/osdep.h | 9 + include/user/tswap-target.h | 2 +- target/alpha/cpu.h | 4 +- target/arm/cpu.h | 4 +- target/arm/internals.h | 3 - target/arm/tcg/vec_internal.h | 5 +- target/avr/cpu.h | 5 +- target/hexagon/cpu_bits.h | 2 + target/hppa/cpu.h | 5 +- target/i386/cpu.h | 2 + target/i386/ops_sse.h | 401 +++++++------- target/i386/tcg/helper-tcg.h | 3 +- target/loongarch/cpu-mmu.h | 3 +- target/loongarch/internals.h | 3 +- target/m68k/cpu.h | 5 +- target/microblaze/cpu.h | 2 + target/mips/cpu.h | 4 +- target/mips/internal.h | 8 +- target/mips/tcg/tcg-internal.h | 2 - target/or1k/cpu.h | 5 +- target/ppc/cpu.h | 2 + target/ppc/internal.h | 18 +- target/riscv/cpu.h | 1 + target/riscv/internals.h | 5 - target/rx/cpu.h | 17 +- target/rx/helper.h | 3 +- target/s390x/cpu.h | 2 + target/s390x/s390x-internal.h | 1 - target/sh4/cpu.h | 22 + target/sparc/cpu.h | 1 + target/tricore/cpu.h | 3 +- target/xtensa/cpu.h | 2 + accel/tcg/cpu-exec-common.c | 36 ++ accel/tcg/cpu-exec.c | 20 +- target/alpha/clk_helper.c | 2 +- target/alpha/cpu.c | 4 +- target/alpha/fpu_helper.c | 60 +-- target/alpha/helper.c | 78 ++- target/alpha/int_helper.c | 38 +- target/alpha/sys_helper.c | 12 +- target/alpha/vax_helper.c | 42 +- target/arm/cpu.c | 21 +- target/arm/helper.c | 77 ++- target/arm/tcg/cpu-v7m.c | 1 - target/arm/tcg/helper-a64.c | 6 +- target/arm/tcg/mve_helper.c | 28 +- target/arm/tcg/psci.c | 2 +- target/arm/tcg/sme_helper.c | 4 +- target/arm/tcg/sve_helper.c | 141 ++--- target/arm/tcg/tlb_helper.c | 2 +- target/arm/tcg/vec_helper.c | 72 +-- target/arm/tcg/vec_helper64.c | 64 +-- target/avr/cpu.c | 20 +- target/avr/helper.c | 23 +- target/hexagon/cpu.c | 51 +- target/hexagon/gdbstub.c | 4 +- target/hexagon/hexswi.c | 30 +- target/hppa/cpu.c | 45 +- target/hppa/fpu_helper.c | 2 +- target/hppa/int_helper.c | 48 +- target/hppa/mem_helper.c | 21 +- target/hppa/op_helper.c | 2 +- target/hppa/sys_helper.c | 6 +- target/i386/cpu.c | 30 ++ target/i386/tcg/bpt_helper.c | 6 +- target/i386/tcg/cc_helper.c | 14 +- target/i386/tcg/excp_helper.c | 15 +- target/i386/tcg/fpu_helper.c | 182 +++---- target/i386/tcg/int_helper.c | 34 +- target/i386/tcg/mem_helper.c | 4 +- target/i386/tcg/misc_helper.c | 16 +- target/i386/tcg/mpx_helper.c | 12 +- target/i386/tcg/seg_helper.c | 43 +- target/i386/tcg/system/bpt_helper.c | 6 +- target/i386/tcg/system/misc_helper.c | 32 +- target/i386/tcg/system/seg_helper.c | 21 +- target/i386/tcg/system/smm_helper.c | 12 +- target/i386/tcg/system/svm_helper.c | 16 +- target/i386/tcg/tcg-cpu.c | 3 +- target/i386/tcg/user/seg_helper.c | 4 +- target/loongarch/cpu.c | 42 +- target/loongarch/cpu_helper.c | 12 +- target/loongarch/tcg/csr_helper.c | 22 +- target/loongarch/tcg/fpu_helper.c | 126 ++--- target/loongarch/tcg/iocsr_helper.c | 16 +- target/loongarch/tcg/op_helper.c | 18 +- target/loongarch/tcg/tcg_cpu.c | 42 -- target/loongarch/tcg/tlb_helper.c | 26 +- target/loongarch/tcg/vec_helper.c | 4 +- target/m68k/cpu.c | 4 +- target/m68k/helper.c | 16 +- target/m68k/op_helper.c | 161 +++--- target/microblaze/cpu.c | 16 +- target/microblaze/op_helper.c | 46 +- target/mips/cpu.c | 4 +- target/mips/gdbstub.c | 85 +-- target/mips/system/physaddr.c | 13 +- target/mips/tcg/dsp_helper.c | 187 +++---- target/mips/tcg/exception.c | 18 +- target/mips/tcg/fpu_helper.c | 291 +++++----- target/mips/tcg/ldst_helper.c | 18 +- target/mips/tcg/lmmi_helper.c | 98 ++-- target/mips/tcg/msa_helper.c | 690 ++++++++++++------------ target/mips/tcg/octeon_crypto.c | 100 ++-- target/mips/tcg/op_helper.c | 34 +- target/mips/tcg/system/cp0_helper.c | 276 +++++----- target/mips/tcg/system/lcsr_helper.c | 8 +- target/mips/tcg/system/special_helper.c | 12 +- target/mips/tcg/system/tlb_helper.c | 14 +- target/mips/tcg/vr54xx_helper.c | 30 +- target/or1k/cpu.c | 4 +- target/or1k/exception.c | 22 + target/or1k/fpu_helper.c | 16 +- target/or1k/interrupt.c | 19 +- target/or1k/mmu.c | 21 +- target/ppc/cpu_init.c | 4 +- target/ppc/dfp_helper.c | 52 +- target/ppc/excp_helper.c | 140 ++--- target/ppc/fpu_helper.c | 396 +++++++------- target/ppc/gdbstub.c | 38 +- target/ppc/int_helper.c | 292 +++++----- target/ppc/mem_helper.c | 28 +- target/ppc/misc_helper.c | 56 +- target/ppc/mmu-hash64.c | 18 +- target/ppc/mmu_helper.c | 70 +-- target/ppc/power8-pmu.c | 14 +- target/ppc/tcg-excp_helper.c | 56 +- target/ppc/timebase_helper.c | 54 +- target/riscv/cpu.c | 22 +- target/riscv/gdbstub.c | 35 +- target/riscv/tcg/debug.c | 2 +- target/riscv/tcg/fpu_helper.c | 196 +++---- target/riscv/tcg/op_helper.c | 76 +-- target/riscv/tcg/tcg-cpu.c | 1 - target/rx/cpu.c | 4 +- target/rx/helper.c | 72 ++- target/rx/op_helper.c | 17 +- target/rx/translate.c | 23 +- target/s390x/cpu-system.c | 2 +- target/s390x/cpu.c | 2 +- target/s390x/interrupt.c | 16 + target/s390x/tcg/excp_helper.c | 6 +- target/s390x/tcg/mem_helper.c | 2 +- target/s390x/tcg/misc_helper.c | 3 +- target/sh4/cpu.c | 2 +- target/sh4/helper.c | 109 ++-- target/sh4/op_helper.c | 92 ++-- target/sparc/cpu.c | 2 +- target/sparc/fop_helper.c | 106 ++-- target/sparc/gdbstub.c | 13 +- target/sparc/helper.c | 22 +- target/sparc/int32_helper.c | 22 +- target/sparc/int64_helper.c | 48 +- target/sparc/ldst_helper.c | 14 +- target/sparc/vis_helper.c | 94 ++-- target/sparc/win_helper.c | 38 +- target/tricore/cpu.c | 3 +- target/tricore/fpu_helper.c | 32 +- target/tricore/helper.c | 13 +- target/tricore/op_helper.c | 220 ++++---- target/xtensa/cpu.c | 25 +- target/xtensa/exc_helper.c | 3 +- util/cutils.c | 6 + target/ppc/translate/vsx-impl.c.inc | 2 +- 170 files changed, 3724 insertions(+), 3401 deletions(-) -- 2.55.0
