AMOCAS accesses retain their natural alignment requirement when Zama16b is enabled, causing misaligned accesses within a naturally aligned 16-byte granule to trap.
Clear the alignment requirement and request MO_ATOM_WITHIN16 in gen_cmpxchg() and in gen_cmpxchg64(), which handles AMOCAS.D using register pairs on RV32. Preserve the existing alignment requirement when Zama16b is disabled. Signed-off-by: GavinQin <[email protected]> --- target/riscv/tcg/insn_trans/trans_rvzacas.c.inc | 4 ++++ target/riscv/tcg/translate.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/target/riscv/tcg/insn_trans/trans_rvzacas.c.inc b/target/riscv/tcg/insn_trans/trans_rvzacas.c.inc index 79bca1e957..7b87f3e640 100644 --- a/target/riscv/tcg/insn_trans/trans_rvzacas.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvzacas.c.inc @@ -77,6 +77,10 @@ static bool gen_cmpxchg64(DisasContext *ctx, arg_atomic *a, MemOp mop) TCGv_i64 src2 = get_gpr_pair(ctx, a->rs2); mop |= ctx->mo_endianness; + if (ctx->cfg_ptr->ext_zama16b) { + mop &= ~MO_AMASK; + mop |= MO_ATOM_WITHIN16; + } decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_i64(dest, src1, dest, src2, ctx->mem_idx, mop); diff --git a/target/riscv/tcg/translate.c b/target/riscv/tcg/translate.c index 70c1088338..3d1bd7371d 100644 --- a/target/riscv/tcg/translate.c +++ b/target/riscv/tcg/translate.c @@ -1180,6 +1180,10 @@ static bool gen_cmpxchg(DisasContext *ctx, arg_atomic *a, MemOp mop) TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE); mop |= ctx->mo_endianness; + if (ctx->cfg_ptr->ext_zama16b && (mop & MO_SIZE) >= MO_16) { + mop &= ~MO_ALIGN; + mop |= MO_ATOM_WITHIN16; + } decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO); tcg_gen_atomic_cmpxchg_tl(dest, src1, dest, src2, ctx->mem_idx, mop); -- 2.34.1
