On 10/26/26 1:13 PM, Farhan Ali wrote:
On subsystem reset of the s390 PCI host bridge (TYPE_S390_PCI_HOST_BRIDGE), child buses S390PCIBus and PCIBus are reset in order. Because S390PCIBus devices are reset first via the legacy reset hook, IOMMU mappings are torn down before the PCI device itself is reset. For a PCI passthrough device this opens a window where the device may issue DMA to addresses that no longer have valid IOMMU mappings, causing an error (PEC 0x7) on the host.The QEMU reset documentation (docs/devel/reset.rst) specifies that IOMMUs should perform teardown in the resettable 'exit' phase, after all devices have completed their 'hold' phase. Move the S390PCIBusDevice reset logic from the legacy reset hook to the resettable exit phase to close this window. Fixes: 3e5cfba3ca0a ("s390x/pci: introduce S390PCIBusDevice qdev") Cc: [email protected] Signed-off-by: Farhan Ali <[email protected]>
I was able to reliably reproduce the failure you described in just a handful of iterations by running iperf3 on a guest with a passthrough mlx5 device, with options to iperf3 for high parallelism and large message size to saturate DMA usage, doing a sysrq hard-reset while the test is still running, and repeating these steps in a tight loop. After applying your patch, no PCI error events were observed across the 200 test iterations. Thank you! Tested-by: Omar Elghoul <[email protected]>
