On 15/10/26 07:56, Jamin Lin wrote:
The DMA flash address register (SPI084) holds the offset of the flash access within the controller's flash window. The AST2700 FMC, SPI0 and SPI1 controllers use a dma_flash_mask of 0x2FFFFFFC, which clears bit 28, and SPI2 uses 0x0FFFFFFC, which limits DMA to the first 256MB of the window.With the default segment layout, FMC CS2 is mapped at offset 0x10000000. A DMA read from that offset is masked to 0x0 and returns data from CS0 instead of CS2. The Linux driver programs SPI084 with the window offset masked by 0x7fffffff, so bit 28 is a valid address bit. Set dma_flash_mask to 0x3FFFFFFC for all AST2700 controllers to cover the full 1GB flash window. Fixes: bdb3748dba30 ("aspeed/smc: Add AST2700 support") Signed-off-by: Jamin Lin <[email protected]> --- hw/ssi/aspeed_smc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
