v2: - remove GIC_ISPENDR workaround: currently under further investigation - simplify SME save/restore patch - rework the CPU reset strategy, with also taking care of the GIC CPU interface registers.
v1: - workaround for presumed Hypervisor.framework issue - save/restore SME state only when SME is on for the CPU - add ID_AA64PFR0_EL1.GIC sync to advertise the system register interface Mohamed Mediouni (6): hvf: arm: save/restore SME state only when SME on hvf: arm: remove broken ID_AA64PFR0_EL1.GIC sync hvf: arm: advertise ID_AA64PFR0_EL1.GIC hvf: arm: fetch more features hvf: gic: sync the CPU interface during a vCPU reset hvf: arm: sync vCPU state on PSCI reset hw/intc/arm_gicv3_hvf.c | 93 ++++++++++++++++++++++++----------------- target/arm/hvf/hvf.c | 45 +++++++++++++++++--- 2 files changed, 93 insertions(+), 45 deletions(-) -- 2.54.0 (Apple Git-157)
