Hi Cédric > Subject: Re: [PATCH v1 06/14] hw/ssi/aspeed_smc: Add AST1040 FMC and SPI > controllers > > On 10/15/26 07:56, Jamin Lin wrote: > > The AST1040 FMC and SPI controllers are compatible with the AST2700 > > controllers, but use different flash window. Therefore, the AST2700 > > controller types cannot be reused directly for AST1040. > > > > Add dedicated AST1040 FMC, SPI0 and SPI1 controller types with the > > appropriate parameter settings. > > > > Signed-off-by: Jamin Lin <[email protected]> > > --- > > hw/ssi/aspeed_smc.c | 109 > ++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 109 insertions(+) > > > > diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index > > c0c3666dbc..89a7dc1105 100644 > > --- a/hw/ssi/aspeed_smc.c > > +++ b/hw/ssi/aspeed_smc.c > > @@ -2072,6 +2072,100 @@ static void > aspeed_2700_spi2_class_init(ObjectClass *klass, const void *data) > > asc->reg_ops = &aspeed_2700_smc_flash_ops; > > } > > > > +static void aspeed_1040_fmc_class_init(ObjectClass *klass, const void > > +*data) { > > + DeviceClass *dc = DEVICE_CLASS(klass); > > + AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); > > + > > + dc->desc = "Aspeed 1040 FMC Controller"; > > + asc->r_conf = R_CONF; > > + asc->r_ce_ctrl = R_CE_CTRL; > > + asc->r_ctrl0 = R_CTRL0; > > + asc->r_timings = R_TIMINGS; > > + asc->nregs_timings = 2; > > + asc->conf_enable_w0 = CONF_ENABLE_W0; > > + asc->cs_num_max = 2; > > + asc->segments = aspeed_2700_spi0_segments; > > + asc->segment_addr_mask = 0xffffffff; > > + asc->flash_window_base = 0x80000000; > > + asc->flash_window_size = 512 * MiB; > > + asc->features = ASPEED_SMC_FEATURE_DMA | > > + > ASPEED_SMC_FEATURE_DMA_DRAM_ADDR_HIGH; > > + asc->dma_flash_mask = 0x1FFFFFFC; > > + asc->dma_dram_mask = 0x00FFFFFC; > > + asc->dma_start_length = 1; > > + asc->nregs = ASPEED_SMC_R_MAX; > > + asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; > > + asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; > > + asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; > > + asc->reg_ops = &aspeed_2700_smc_flash_ops; > > +} > > + > > +static const AspeedSegments aspeed_1040_spi0_segments[] = { > > + { 0x0, 128 * MiB }, > > + { 128 * MiB, 128 * MiB }, > > + { 256 * MiB, 128 * MiB }, > > + { 384 * MiB, 128 * MiB }, > > +}; > > + > > +static void aspeed_1040_spi0_class_init(ObjectClass *klass, const > > +void *data) { > > + DeviceClass *dc = DEVICE_CLASS(klass); > > + AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); > > + > > + dc->desc = "Aspeed 1040 SPI0 Controller"; > > + asc->r_conf = R_CONF; > > + asc->r_ce_ctrl = R_CE_CTRL; > > + asc->r_ctrl0 = R_CTRL0; > > + asc->r_timings = R_TIMINGS; > > + asc->nregs_timings = 4; > > + asc->conf_enable_w0 = CONF_ENABLE_W0; > > + asc->cs_num_max = 4; > > + asc->segments = aspeed_1040_spi0_segments; > > + asc->segment_addr_mask = 0xffffffff; > > + asc->flash_window_base = 0xA0000000; > > + asc->flash_window_size = 512 * MiB; > > + asc->features = ASPEED_SMC_FEATURE_DMA | > > + > ASPEED_SMC_FEATURE_DMA_DRAM_ADDR_HIGH; > > + asc->dma_flash_mask = 0x1FFFFFFC; > > + asc->dma_dram_mask = 0x00FFFFFC; > > + asc->dma_start_length = 1; > > + asc->nregs = ASPEED_SMC_R_MAX; > > + asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; > > + asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; > > + asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; > > + asc->reg_ops = &aspeed_2700_smc_flash_ops; > > +} > > + > > +static void aspeed_1040_spi1_class_init(ObjectClass *klass, const > > +void *data) { > > + DeviceClass *dc = DEVICE_CLASS(klass); > > + AspeedSMCClass *asc = ASPEED_SMC_CLASS(klass); > > + > > + dc->desc = "Aspeed 1040 SPI1 Controller"; > > + asc->r_conf = R_CONF; > > + asc->r_ce_ctrl = R_CE_CTRL; > > + asc->r_ctrl0 = R_CTRL0; > > + asc->r_timings = R_TIMINGS; > > + asc->nregs_timings = 2; > > + asc->conf_enable_w0 = CONF_ENABLE_W0; > > + asc->cs_num_max = 2; > > + asc->segments = aspeed_2700_spi0_segments; > > + asc->segment_addr_mask = 0xffffffff; > > + asc->flash_window_base = 0xC0000000; > > + asc->flash_window_size = 512 * MiB; > > + asc->features = ASPEED_SMC_FEATURE_DMA | > > + > ASPEED_SMC_FEATURE_DMA_DRAM_ADDR_HIGH; > > + asc->dma_flash_mask = 0x1FFFFFFC; > > + asc->dma_dram_mask = 0x00FFFFFC; > > + asc->dma_start_length = 1; > > + asc->nregs = ASPEED_SMC_R_MAX; > > + asc->segment_to_reg = aspeed_2700_smc_segment_to_reg; > > + asc->reg_to_segment = aspeed_2700_smc_reg_to_segment; > > + asc->dma_ctrl = aspeed_2600_smc_dma_ctrl; > > + asc->reg_ops = &aspeed_2700_smc_flash_ops; > > +} > > + > > static const TypeInfo aspeed_smc_types[] = { > > { > > .name = TYPE_ASPEED_SMC_FLASH, > > @@ -2103,6 +2197,21 @@ static const TypeInfo aspeed_smc_types[] = { > > .parent = TYPE_ASPEED_SMC, > > .class_init = aspeed_1030_spi2_class_init, > > }, > > + { > > + .name = "aspeed.fmc-ast1040", > > + .parent = TYPE_ASPEED_SMC, > > + .class_init = aspeed_1040_fmc_class_init, > > + }, > > + { > > + .name = "aspeed.spi0-ast1040", > > + .parent = TYPE_ASPEED_SMC, > > + .class_init = aspeed_1040_spi0_class_init, > > + }, > > + { > > + .name = "aspeed.spi1-ast1040", > > + .parent = TYPE_ASPEED_SMC, > > + .class_init = aspeed_1040_spi1_class_init, > > + }, > > { > > .name = "aspeed.smc-ast2400", > > .parent = TYPE_ASPEED_SMC, > > > no need for ast1040 specific asc->resets ? > Thanks for the review and suggestion. Will add.
Jamin > C.
