From: Keith Monahan <[email protected]>
HP-UX 9.05 only supports 15-bit protection IDs and gets a protection
fault on its own interrupt stack when allowing 18-bits.
Since the architecture manual states that if smaller than 18-bit access IDs
are physically implemented in the CPU, only the appropriate number of
rightmost bits of GR[r]{13..30} are stored in the TLB.
PA7100 and PA7100LC only support 15 bit protection IDs, so use this
amount of bits here.
Signed-off-by: Keith Monahan <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
---
target/hppa/mem_helper.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index a5da0bc851..7a316f59ea 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -538,7 +538,15 @@ void HELPER(itlba_pa11)(CPUHPPAState *env, target_ulong
addr, target_ulong reg)
static void set_access_bits_pa11(CPUHPPAState *env, HPPATLBEntry *ent,
target_ulong reg)
{
- ent->access_id = extract32(reg, 1, 18);
+ /*
+ * The architecture manual states that if smaller than 18-bit access IDs
+ * are physically implemented in the CPU, only the appropriate number of
+ * rightmost bits of GR[r]{13..30} are stored in the TLB. Older parisc
+ * chips (PCXS, PCXT, PCXL, PCXL2) only support 15 bit protection IDs.
+ * PCXT' (pa7200) has 18 bit protection IDs, but only 16 bit spaceids.
+ * We currently emulate PA7100 and PA7100LC CPUs, so use 15 bits here.
+ */
+ ent->access_id = extract32(reg, 1, 15); /* 15-bit PA1.1 PIDs */
ent->u = extract32(reg, 19, 1);
ent->ar_pl2 = extract32(reg, 20, 2);
ent->ar_pl1 = extract32(reg, 22, 2);
--
2.54.0
