Let each hardware thread run in its own TCG thread. The state that the threads share (the global registers, the k0 and TLB locks, interrupt delivery) is already serialized by the BQL, and guest_default_memory_order stays TCG_MO_ALL, so guest memory ordering is unchanged. -accel tcg,thread=single still selects the single round-robin thread.
Reviewed-by: Pierrick Bouvier <[email protected]> Signed-off-by: Brian Cain <[email protected]> --- target/hexagon/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 607dddf7e7c..b09955e47a7 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -863,9 +863,8 @@ void hexagon_cpu_do_unaligned_access(CPUState *cs, vaddr addr, #endif static const TCGCPUOps hexagon_tcg_ops = { - /* MTTCG not yet supported: require strict ordering */ .guest_default_memory_order = TCG_MO_ALL, - .mttcg_supported = false, + .mttcg_supported = true, .initialize = hexagon_translate_init, .translate_code = hexagon_translate_code, .get_tb_cpu_state = hexagon_get_tb_cpu_state, -- 2.34.1
