Add a generic DesignWare APB timer device model, and wire it up for the K230 machine with num-timers=6 and a 50 MHz clock. Also add qtest coverage for the timer behavior.
Changes since v5: - Rebase onto current master - No functional changes Changes since v4 (address review comments from Philippe Mathieu-Daude): - Drop Clock framework mention from the commit message - Cover the device in MAINTAINERS (device files in patch 1/3, test file in patch 3/3) - Move trace calls to function entry - Drop the addr mask; the MMIO region stays at 0x100 (the IP register implementation range; the SoC aperture is board-level) - Hard-code comp-version (0x3231312A, "211*", IP component version) - Use the Resettable API (phases.hold) instead of legacy reset - Add unrealize to free per-channel ptimers - Keep register offsets and bit definitions in the C file - Drop private/public comments in the header - Move K230 timer macros into k230.c Changes in v5: - Rename DW_APB_TIMER_CONTROL_INT to DW_APB_TIMER_CONTROL_INT_MASK - Fix the K230 timer clock frequency from 6.25 MHz to 50 MHz - Wrap the qtest commit message at about 70 characters per line - Register both K230 qtests directly under CONFIG_K230 Testing: - QEMU build passed in the Debian container - tests/qtest/k230-dwapb-timer-test: 8/8 passed raoyi (3): hw/timer: add DesignWare APB timer model hw/riscv: add DesignWare APB timer to K230 board tests/qtest: add k230 dwapb timer test MAINTAINERS | 3 + hw/riscv/Kconfig | 1 + hw/riscv/k230.c | 33 ++- hw/timer/Kconfig | 4 + hw/timer/dw-apb-timer.c | 376 ++++++++++++++++++++++++++++ hw/timer/meson.build | 1 + hw/timer/trace-events | 8 + include/hw/riscv/k230.h | 8 + include/hw/timer/dw-apb-timer.h | 40 +++ tests/qtest/k230-dwapb-timer-test.c | 274 ++++++++++++++++++++ tests/qtest/meson.build | 3 +- 11 files changed, 747 insertions(+), 4 deletions(-) create mode 100644 hw/timer/dw-apb-timer.c create mode 100644 include/hw/timer/dw-apb-timer.h create mode 100644 tests/qtest/k230-dwapb-timer-test.c -- 2.53.0
