From: Marco Liebel <[email protected]> Define HLX pair arithmetic, compare, logical, and combine instructions.
Signed-off-by: Marco Liebel <[email protected]> Reviewed-by: Brian Cain <[email protected]> Signed-off-by: Brian Cain <[email protected]> --- target/hexagon/imported/hlx/encode_ext.def | 40 +++++++ target/hexagon/imported/hlx_ext.idef | 117 +++++++++++++++++++++ 2 files changed, 157 insertions(+) diff --git a/target/hexagon/imported/hlx/encode_ext.def b/target/hexagon/imported/hlx/encode_ext.def index cb6d1b03d80..5a11f58d792 100644 --- a/target/hexagon/imported/hlx/encode_ext.def +++ b/target/hexagon/imported/hlx/encode_ext.def @@ -51,6 +51,46 @@ DEF_ENC(LX_sub_wuh,"11100101001vvvv-PP1010uuuu0dddd1") DEF_ENC(LX_assign_u,"11100101001iiiiiPP1010----1dddd0") DEF_ENC(LX_assign_s,"11100101001iiiiiPP1010----1dddd1") +DEF_ENC(LX_add_w,"11101111000vvvv-PP1000uuuu0dddd0") +DEF_ENC(LX_add_w_sat,"11101111000vvvv-PP1000uuuu0dddd1") +DEF_ENC(LX_add_uw_sat,"11101111000vvvv-PP1000uuuu1dddd0") +DEF_ENC(LX_add_uw_w_sat,"11101111000vvvv-PP1000uuuu1dddd1") +DEF_ENC(LX_sub_w,"11101111000vvvv-PP1001uuuu0dddd0") +DEF_ENC(LX_sub_w_sat,"11101111000vvvv-PP1001uuuu0dddd1") +DEF_ENC(LX_sub_uw_sat,"11101111000vvvv-PP1001uuuu1dddd0") +DEF_ENC(LX_sub_uw_w_sat,"11101111000vvvv-PP1001uuuu1dddd1") +DEF_ENC(LX_add_hp,"11101111000vvvv-PP1010uuuu0dddd0") +DEF_ENC(LX_add_hp_sat,"11101111000vvvv-PP1010uuuu0dddd1") +DEF_ENC(LX_add_uhp_sat,"11101111000vvvv-PP1010uuuu1dddd0") +DEF_ENC(LX_add_uhp_h_sat,"11101111000vvvv-PP1010uuuu1dddd1") +DEF_ENC(LX_sub_hp,"11101111000vvvv-PP1011uuuu0dddd0") +DEF_ENC(LX_sub_hp_sat,"11101111000vvvv-PP1011uuuu0dddd1") +DEF_ENC(LX_sub_uhp_sat,"11101111000vvvv-PP1011uuuu1dddd0") +DEF_ENC(LX_sub_uhp_h_sat,"11101111000vvvv-PP1011uuuu1dddd1") +DEF_ENC(LX_abs_uw,"11101111000-----PP1100uuuu0dddd0") +DEF_ENC(LX_abs_uw_sat,"11101111000-----PP1100uuuu0dddd1") +DEF_ENC(LX_abs_uhp,"11101111000-----PP1100uuuu1dddd0") +DEF_ENC(LX_abs_uhp_sat,"11101111000-----PP1100uuuu1dddd1") +DEF_ENC(LX_cmp_gt_uw,"11101111000vvvv-PP1101uuuu0dddd0") +DEF_ENC(LX_cmp_gt_w,"11101111000vvvv-PP1101uuuu0dddd1") +DEF_ENC(LX_cmp_gt_hp,"11101111000vvvv-PP1101uuuu1dddd0") +DEF_ENC(LX_cmp_gt_uhp,"11101111000vvvv-PP1101uuuu1dddd1") +DEF_ENC(LX_min_hp,"11101111000vvvv-PP1110uuuu0dddd0") +DEF_ENC(LX_min_uhp,"11101111000vvvv-PP1110uuuu0dddd1") +DEF_ENC(LX_max_hp,"11101111000vvvv-PP1110uuuu1dddd0") +DEF_ENC(LX_max_uhp,"11101111000vvvv-PP1110uuuu1dddd1") +DEF_ENC(LX_min_w,"11101111000vvvv-PP1111uuuu0dddd0") +DEF_ENC(LX_min_uw,"11101111000vvvv-PP1111uuuu0dddd1") +DEF_ENC(LX_max_w,"11101111000vvvv-PP1111uuuu1dddd0") +DEF_ENC(LX_max_uw,"11101111000vvvv-PP1111uuuu1dddd1") +DEF_ENC(LX_and_w,"11101111001vvvv-PP1000uuuu0dddd0") +DEF_ENC(LX_or_w,"11101111001vvvv-PP1000uuuu0dddd1") +DEF_ENC(LX_xor_w,"11101111001vvvv-PP1000uuuu1dddd0") +DEF_ENC(LX_combine_w,"11101111001vvvv-PP1000uuuu1dddd1") +DEF_ENC(LX_andn_w,"11101111001vvvv-PP1001uuuu0dddd0") +DEF_ENC(LX_not_w,"11101111001-----PP1001uuuu0dddd1") +DEF_ENC(LX_orn_w,"11101111001vvvv-PP1001uuuu1dddd0") + #undef DEF_ENC #undef EXTEXTNAME #undef CONCAT diff --git a/target/hexagon/imported/hlx_ext.idef b/target/hexagon/imported/hlx_ext.idef index 4cee4ce8167..47e11714731 100644 --- a/target/hexagon/imported/hlx_ext.idef +++ b/target/hexagon/imported/hlx_ext.idef @@ -85,18 +85,90 @@ fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fZXTN(16,32,LuV.uh[i]); }) EXTINSN(LX_conv_w_h,"Ldd16.w=sxt(Lu16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Convert halfword to word", fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = fSXTN(16,32,LuV.h[i]); }) +EXTINSN(LX_add_w,"Ldd16.w=add(Luu16.w,Lvv16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector add word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w + LvvV.l[i].w; }) + +EXTINSN(LX_add_w_sat,"Ldd16.w=add(Luu16.w,Lvv16.w):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector add & saturate word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = fVSADDSAT(32, LuuV.l[i].w, LvvV.l[i].w); }) + +EXTINSN(LX_add_uw_sat,"Ldd16.uw=add(Luu16.uw,Lvv16.uw):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector add & saturate unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fVUADDSAT(32, LuuV.l[i].uw, LvvV.l[i].uw); }) + +EXTINSN(LX_add_uw_w_sat,"Ldd16.uw=add(Luu16.w,Lvv16.w):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector add & saturate unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fVUSADDSAT(32, LuuV.l[i].w, LvvV.l[i].w); }) + +EXTINSN(LX_sub_w,"Ldd16.w=sub(Luu16.w,Lvv16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector sub word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w - LvvV.l[i].w; }) + +EXTINSN(LX_sub_w_sat,"Ldd16.w=sub(Luu16.w,Lvv16.w):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector sub & saturate word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = fVSSUBSAT(32, LuuV.l[i].w, LvvV.l[i].w); }) + +EXTINSN(LX_sub_uw_sat,"Ldd16.uw=sub(Luu16.uw,Lvv16.uw):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector sub & saturate unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fVUSUBSAT(32, LuuV.l[i].uw, LvvV.l[i].uw); }) + +EXTINSN(LX_sub_uw_w_sat,"Ldd16.uw=sub(Luu16.w,Lvv16.w):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector sub & saturate unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fVUSSUBSAT(32, LuuV.l[i].w, LvvV.l[i].w); }) + +EXTINSN(LX_add_hp,"Ldd16.h=add(Luu16.h,Lvv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register add paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = LuuV.l[i].h[0] + LvvV.l[i].h[0]; LddV.l[i].h[1] = LuuV.l[i].h[1] + LvvV.l[i].h[1] ; }) + +EXTINSN(LX_add_hp_sat,"Ldd16.h=add(Luu16.h,Lvv16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register add & saturate paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = fVSADDSAT(16, LuuV.l[i].h[0], LvvV.l[i].h[0]); LddV.l[i].h[1] = fVSADDSAT(16, LuuV.l[i].h[1], LvvV.l[i].h[1]) ; }) + +EXTINSN(LX_add_uhp_sat,"Ldd16.uh=add(Luu16.uh,Lvv16.uh):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register add & saturate unsigned paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = fVUADDSAT(16, LuuV.l[i].uh[0], LvvV.l[i].uh[0]); LddV.l[i].uh[1] = fVUADDSAT(16, LuuV.l[i].uh[1], LvvV.l[i].uh[1]) ; }) + +EXTINSN(LX_add_uhp_h_sat,"Ldd16.uh=add(Luu16.h,Lvv16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register add & saturate unsigned paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = fVUSADDSAT(16, LuuV.l[i].h[0], LvvV.l[i].h[0]); LddV.l[i].uh[1] = fVUSADDSAT(16, LuuV.l[i].h[1], LvvV.l[i].h[1]) ; }) + +EXTINSN(LX_sub_hp,"Ldd16.h=sub(Luu16.h,Lvv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register sub paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = LuuV.l[i].h[0] - LvvV.l[i].h[0]; LddV.l[i].h[1] = LuuV.l[i].h[1] - LvvV.l[i].h[1] ; }) + +EXTINSN(LX_sub_hp_sat,"Ldd16.h=sub(Luu16.h,Lvv16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register sub & saturate paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = fVSSUBSAT(16, LuuV.l[i].h[0], LvvV.l[i].h[0]); LddV.l[i].h[1] = fVSSUBSAT(16, LuuV.l[i].h[1], LvvV.l[i].h[1]) ; }) + +EXTINSN(LX_sub_uhp_sat,"Ldd16.uh=sub(Luu16.uh,Lvv16.uh):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register sub & saturate unsigned paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = fVUSUBSAT(16, LuuV.l[i].uh[0], LvvV.l[i].uh[0]); LddV.l[i].uh[1] = fVUSUBSAT(16, LuuV.l[i].uh[1], LvvV.l[i].uh[1]) ; }) + +EXTINSN(LX_sub_uhp_h_sat,"Ldd16.uh=sub(Luu16.h,Lvv16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"L register sub & saturate unsigned paired halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = fVUSSUBSAT(16, LuuV.l[i].h[0], LvvV.l[i].h[0]); LddV.l[i].uh[1] = fVUSSUBSAT(16, LuuV.l[i].h[1], LvvV.l[i].h[1]) ; }) + EXTINSN(LX_abs_uh,"Ld16.uh=abs(Lu16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Absolute value of large vector of half word", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i] = fABSW(LuV.h[i]); }) EXTINSN(LX_abs_uh_sat,"Ld16.h=abs(Lu16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Absolute value & saturate of large vector of half word", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i] = fVSATH(fABSW(LuV.h[i])); }) +EXTINSN(LX_abs_uw,"Ldd16.uw=abs(Luu16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Absolute value of large vector of word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = fABSW(LuuV.l[i].w); }) + +EXTINSN(LX_abs_uw_sat,"Ldd16.w=abs(Luu16.w):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Absolute value & saturate of large vector of word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = fVSATW(fABSW(LuuV.l[i].w)); }) + +EXTINSN(LX_abs_uhp,"Ldd16.uh=abs(Luu16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Absolute value of L register pair halfword", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = fABSW(LuuV.l[i].h[0]); LddV.l[i].uh[1] = fABSW(LuuV.l[i].h[1]) ; }) + +EXTINSN(LX_abs_uhp_sat,"Ldd16.h=abs(Luu16.h):sat",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Absolute value & saturate of large vector of word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = fVSATH(fABSW(LuuV.l[i].h[0])); LddV.l[i].h[1] = fVSATH(fABSW(LuuV.l[i].h[1])) ; }) + EXTINSN(LX_cmp_gt_uh,"Ld16.h=cmp.gt(Lu16.uh, Lv16.uh)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Unsigned compare greater than", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i] = (LuV.uh[i] > LvV.uh[i]) ? 0xFFFF : 0x0; }) EXTINSN(LX_cmp_gt_h,"Ld16.h=cmp.gt(Lu16.h, Lv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Signed compare greater than", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i] = (LuV.h[i] > LvV.h[i]) ? 0xFFFF : 0x0; }) +EXTINSN(LX_cmp_gt_w,"Ldd16.w=cmp.gt(Luu16.w, Lvv16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector signed word compare greater than", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = (LuuV.l[i].w > LvvV.l[i].w) ? 0xFFFFFFFF : 0x0; }) + +EXTINSN(LX_cmp_gt_uw,"Ldd16.w=cmp.gt(Luu16.uw, Lvv16.uw)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Word element compare greater than", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = (LuuV.l[i].uw > LvvV.l[i].uw) ? 0xFFFFFFFF : 0x0; }) + +EXTINSN(LX_cmp_gt_hp,"Ldd16.h=cmp.gt(Luu16.h, Lvv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector signed word compare greater than", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = (LuuV.l[i].h[0] > LvvV.l[i].h[0]) ? 0xFFFF : 0x0; LddV.l[i].h[1] = (LuuV.l[i].h[1] > LvvV.l[i].h[1]) ? 0xFFFF : 0x0 ; }) + +EXTINSN(LX_cmp_gt_uhp,"Ldd16.h=cmp.gt(Luu16.uh, Lvv16.uh)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Word element compare greater than", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = (LuuV.l[i].uh[0] > LvvV.l[i].uh[0]) ? 0xFFFF : 0x0; LddV.l[i].h[1] = (LuuV.l[i].uh[1] > LvvV.l[i].uh[1]) ? 0xFFFF : 0x0 ; }) + EXTINSN(LX_max_uh,"Ld16.uh=max(Lu16.uh,Lv16.uh)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Large vector max ", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i] = (LuV.uh[i] > LvV.uh[i]) ? LuV.uh[i] : LvV.uh[i]; }) @@ -109,6 +181,30 @@ fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i] = (LuV.h[i] > LvV.h[i]) ? LuV.h[i] EXTINSN(LX_min_h,"Ld16.h=min(Lu16.h,Lv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Large vector max ", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i] = (LuV.h[i] < LvV.h[i]) ? LuV.h[i] : LvV.h[i]; }) +EXTINSN(LX_min_w,"Ldd16.w=min(Luu16.w,Lvv16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector min word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = (LuuV.l[i].w < LvvV.l[i].w) ? LuuV.l[i].w : LvvV.l[i].w; }) + +EXTINSN(LX_min_uw,"Ldd16.uw=min(Luu16.uw,Lvv16.uw)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector min unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = (LuuV.l[i].uw < LvvV.l[i].uw) ? LuuV.l[i].uw : LvvV.l[i].uw; }) + +EXTINSN(LX_max_w,"Ldd16.w=max(Luu16.w,Lvv16.w)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector max word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = (LuuV.l[i].w > LvvV.l[i].w) ? LuuV.l[i].w : LvvV.l[i].w; }) + +EXTINSN(LX_max_uw,"Ldd16.uw=max(Luu16.uw,Lvv16.uw)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector max unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw = (LuuV.l[i].uw > LvvV.l[i].uw) ? LuuV.l[i].uw : LvvV.l[i].uw; }) + +EXTINSN(LX_min_hp,"Ldd16.h=min(Luu16.h,Lvv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector min word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = (LuuV.l[i].h[0] < LvvV.l[i].h[0]) ? LuuV.l[i].h[0] : LvvV.l[i].h[0]; LddV.l[i].h[1] = (LuuV.l[i].h[1] < LvvV.l[i].h[1]) ? LuuV.l[i].h[1] : LvvV.l[i].h[1]; ; }) + +EXTINSN(LX_min_uhp,"Ldd16.uh=min(Luu16.uh,Lvv16.uh)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector min unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = (LuuV.l[i].uh[0] < LvvV.l[i].uh[0]) ? LuuV.l[i].uh[0] : LvvV.l[i].uh[0]; LddV.l[i].uh[1] = (LuuV.l[i].uh[1] < LvvV.l[i].uh[1]) ? LuuV.l[i].uh[1] : LvvV.l[i].uh[1]; ; }) + +EXTINSN(LX_max_hp,"Ldd16.h=max(Luu16.h,Lvv16.h)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector max word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[0] = (LuuV.l[i].h[0] > LvvV.l[i].h[0]) ? LuuV.l[i].h[0] : LvvV.l[i].h[0]; LddV.l[i].h[1] = (LuuV.l[i].h[1] > LvvV.l[i].h[1]) ? LuuV.l[i].h[1] : LvvV.l[i].h[1]; ; }) + +EXTINSN(LX_max_uhp,"Ldd16.uh=max(Luu16.uh,Lvv16.uh)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector max unsigned word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uh[0] = (LuuV.l[i].uh[0] > LvvV.l[i].uh[0]) ? LuuV.l[i].uh[0] : LvvV.l[i].uh[0]; LddV.l[i].uh[1] = (LuuV.l[i].uh[1] > LvvV.l[i].uh[1]) ? LuuV.l[i].uh[1] : LvvV.l[i].uh[1]; ; }) + EXTINSN(LX_and,"Ld16=and(Lu16,Lv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Logical And", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i] = LuV.uh[i] & LvV.uh[i]; }) @@ -127,12 +223,33 @@ fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i] = LuV.uh[i] & ~LvV.uh[i]; }) EXTINSN(LX_orn,"Ld16=orn(Lu16,Lv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Logical not OR", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i] = LuV.uh[i] | ~LvV.uh[i]; }) +EXTINSN(LX_and_w,"Ldd16=and(Luu16,Lvv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector logical AND word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w & LvvV.l[i].w; }) + +EXTINSN(LX_or_w,"Ldd16=or(Luu16,Lvv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector logical OR word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w | LvvV.l[i].w; }) + +EXTINSN(LX_xor_w,"Ldd16=xor(Luu16,Lvv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector logical XOR word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w ^ LvvV.l[i].w; }) + +EXTINSN(LX_andn_w,"Ldd16=andn(Luu16,Lvv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector logical AND NOT word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w & ~LvvV.l[i].w; }) + +EXTINSN(LX_orn_w,"Ldd16=orn(Luu16,Lvv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Large vector logical OR NOT word", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w = LuuV.l[i].w | ~LvvV.l[i].w; }) + +EXTINSN(LX_not_w,"Ldd16=not(Luu16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Assign an Lreg", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].uw=~LuuV.l[i].uw; }) + EXTINSN(LX_assign,"Ld16.h=Lu16.h",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Assign an Lreg", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.uh[i]=LuV.uh[i]; }) EXTINSN(LX_assign_w,"Ldd16.w=Luu16.w",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23),"Assign a double Lreg", fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].w=LuuV.l[i].w; }) +EXTINSN(LX_combine_w,"Ldd16=combine(Lu16,Lv16)",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_SHIFT,A_RESTRICT_SLOT2ONLY,A_HLX_PAIRED_ALU),"Combine two lregs", +fHIDE(int i;) fLVFOREACH(1024, i) { LddV.l[i].h[1] = LuV.h[i]; LddV.l[i].h[0] = LvV.h[i];; }) + EXTINSN(LX_assign_r,"Ld16.h=Rt32.h",ATTRIBS(A_HLX,A_EXTENSION,A_NO_IDEF_PARSER,A_HLX_COMMON_ALU,A_HLX_SLOT23,A_HLX_CU_SCALAR,A_HLX_SCALAR32),"Assign half a scalar register to L register", fHIDE(int i;) fLVFOREACH(1024, i) { LdV.h[i]=fGETHALF(0,RtV); }) -- 2.34.1
