Am 7. Oktober 2026 10:10:56 UTC schrieb Gaurav Sharma <[email protected]>: >This is a mechanical rename with no functional change. >The existing CPU count and cpu array describe only the >Cortex-A53 cores. > >Signed-off-by: Gaurav Sharma <[email protected]> >--- > hw/arm/fsl-imx8mp.c | 4 ++-- > hw/arm/imx8mp-evk.c | 2 +- > include/hw/arm/fsl-imx8mp.h | 4 ++-- > 3 files changed, 5 insertions(+), 5 deletions(-) > >diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c >index bcd91739d9..f599e5e0a2 100644 >--- a/hw/arm/fsl-imx8mp.c >+++ b/hw/arm/fsl-imx8mp.c >@@ -266,9 +266,9 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error >**errp) > const char *cpu_type = ms->cpu_type ?: ARM_CPU_TYPE_NAME("cortex-a53"); > int i; > >- if (ms->smp.cpus > FSL_IMX8MP_NUM_CPUS) { >+ if (ms->smp.cpus > FSL_IMX8MP_NUM_A53) { > error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", >- TYPE_FSL_IMX8MP, FSL_IMX8MP_NUM_CPUS, ms->smp.cpus); >+ TYPE_FSL_IMX8MP, FSL_IMX8MP_NUM_A53, ms->smp.cpus); > return; > } > >diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c >index 3f376f86d9..f19d80b796 100644 >--- a/hw/arm/imx8mp-evk.c >+++ b/hw/arm/imx8mp-evk.c >@@ -148,7 +148,7 @@ static void imx8mp_evk_machine_class_init(ObjectClass *oc, >const void *data) > mc->desc = "NXP i.MX 8M Plus EVK Board"; > mc->init = imx8mp_evk_init; > mc->default_cpus = 4; >- mc->max_cpus = FSL_IMX8MP_NUM_CPUS; >+ mc->max_cpus = FSL_IMX8MP_NUM_A53; > mc->default_ram_id = "imx8mp-evk.ram"; > mc->default_ram_size = 6 * GiB; > mc->get_default_cpu_type = imx8mp_evk_get_default_cpu_type; >diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h >index 2be3c51af5..6f9bd8d2ce 100644 >--- a/include/hw/arm/fsl-imx8mp.h >+++ b/include/hw/arm/fsl-imx8mp.h >@@ -39,7 +39,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP) > > enum FslImx8mpConfiguration { > FSL_IMX8MP_NUM_CANS = 2, >- FSL_IMX8MP_NUM_CPUS = 4, >+ FSL_IMX8MP_NUM_A53 = 4, > FSL_IMX8MP_NUM_ECSPIS = 3, > FSL_IMX8MP_NUM_GPIOS = 5, > FSL_IMX8MP_NUM_GPTS = 6, >@@ -54,7 +54,7 @@ enum FslImx8mpConfiguration { > struct FslImx8mpState { > SysBusDevice parent_obj; > >- ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; >+ ARMCPU cpu[FSL_IMX8MP_NUM_A53]; > GICv3State gic; > IMXGPTState gpt[FSL_IMX8MP_NUM_GPTS]; > IMXGPIOState gpio[FSL_IMX8MP_NUM_GPIOS]; Reviewed-by: Bernhard Beschow <[email protected]>
