On Thu, Aug 2, 2012 at 2:20 PM, Itaru Kitayama <kitay...@cl.bb4u.ne.jp> wrote: > The recent upstream highbank kernel uses smc to enable its L2 cache, > but on a qemu virt machine > it is not supported yet. Is it likely supported by qemu soon? What is > the time frame for that?
For other people reading this, SMC is the instruction used by ARM processors to call routines written in the Secure world. The issue here is that even if you had support for that instruction, it wouldn't be enough because each platform has different SMC implementations, which code of course is not public, and quite often even the API is undocumented. Riku Voipio has a branch which implements some basic security stuff here: http://git.linaro.org/gitweb?p=people/rikuvoipio/qemu.git;a=shortlog;h=refs/heads/linaro (That branch is old, but it can help to understand the basic stuff needed.) In helper.c: case EXCP_SMC: if (semihosting_enabled) { cpu_abort(env, "SMC handling under semihosting not implemented\n"); return; } if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SMC) { env->cp15.c1_secfg &= ~1; } offset = env->thumb ? 2 : 0; new_mode = ARM_CPU_MODE_SMC; addr = 0x08; mask = CPSR_A | CPSR_I | CPSR_F; break; If you know the SMC API, you could perhaps plug some code to run when semihosting_enabled is set (though that might conflict with the other uses of that flag, so one could perhaps use some other flag that would say if we simulate SMC code for OMAP, or Calxeda, or Tegra 3, etc.). > If support can not be expected any time soon, how do we work around > the issue? I have been using > qemu-linaro-1.1.50-2012.07. I'm afraid the easiest way is to patch the kernel. Laurent