From: Nicholas Piggin <[email protected]> Setting msix entry address and data and masking is moved into common code helpers from virtio tests.
For now that remains the only user, but there are changes under development to enable msix vectors for msix, e1000e, and xhci tests, which can make use of them. Reviewed-by: Akihiko Odaki <[email protected]> Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Jishnu Warrier <[email protected]> Signed-off-by: Utkarsh Verma <[email protected]> --- tests/qtest/libqos/pci.c | 49 +++++++++++++++++++++++++++++++++ tests/qtest/libqos/pci.h | 3 ++ tests/qtest/libqos/virtio-pci.c | 48 ++++---------------------------- 3 files changed, 57 insertions(+), 43 deletions(-) diff --git a/tests/qtest/libqos/pci.c b/tests/qtest/libqos/pci.c index 41f9673022..253c5df3e4 100644 --- a/tests/qtest/libqos/pci.c +++ b/tests/qtest/libqos/pci.c @@ -339,6 +339,24 @@ void qpci_msix_disable(QPCIDevice *dev) dev->msix_pba_off = 0; } +void qpci_msix_set_entry(QPCIDevice *dev, uint16_t entry, + uint64_t guest_addr, uint32_t data) +{ + uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE; + + g_assert(dev->msix_enabled); + g_assert_cmpint(entry, <, qpci_msix_table_size(dev)); + + qpci_io_writel(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_LOWER_ADDR, guest_addr & ~0UL); + qpci_io_writel(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_UPPER_ADDR, + (guest_addr >> 32) & ~0UL); + + qpci_io_writel(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_DATA, data); +} + bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry) { uint32_t pba_entry; @@ -346,6 +364,8 @@ bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry) uint64_t off = (entry / 32) * PCI_MSIX_ENTRY_SIZE / 4; g_assert(dev->msix_enabled); + g_assert_cmpint(entry, <, qpci_msix_table_size(dev)); + pba_entry = qpci_io_readl(dev, dev->msix_pba_bar, dev->msix_pba_off + off); return (pba_entry & (1 << bit_n)) != 0; } @@ -357,6 +377,8 @@ bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry) uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE; g_assert(dev->msix_enabled); + g_assert_cmpint(entry, <, qpci_msix_table_size(dev)); + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); g_assert_cmphex(addr, !=, 0); val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); @@ -370,6 +392,33 @@ bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry) } } +void qpci_msix_set_masked(QPCIDevice *dev, uint16_t entry, bool masked) +{ + uint8_t addr; + uint16_t val; + uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE; + + g_assert(dev->msix_enabled); + g_assert_cmpint(entry, <, qpci_msix_table_size(dev)); + + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); + g_assert_cmphex(addr, !=, 0); + val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); + g_assert(!(val & PCI_MSIX_FLAGS_MASKALL)); + + val = qpci_io_readl(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_VECTOR_CTRL); + if (masked && !(val & PCI_MSIX_ENTRY_CTRL_MASKBIT)) { + qpci_io_writel(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_VECTOR_CTRL, + val | PCI_MSIX_ENTRY_CTRL_MASKBIT); + } else if (!masked && (val & PCI_MSIX_ENTRY_CTRL_MASKBIT)) { + qpci_io_writel(dev, dev->msix_table_bar, + vector_off + PCI_MSIX_ENTRY_VECTOR_CTRL, + val & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); + } +} + /** * qpci_msix_test_interrupt - test whether MSI-X interrupt has been raised * @dev: PCI device diff --git a/tests/qtest/libqos/pci.h b/tests/qtest/libqos/pci.h index 2fcddd19a8..986cc53c3a 100644 --- a/tests/qtest/libqos/pci.h +++ b/tests/qtest/libqos/pci.h @@ -97,8 +97,11 @@ void qpci_device_enable(QPCIDevice *dev); uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr); void qpci_msix_enable(QPCIDevice *dev); void qpci_msix_disable(QPCIDevice *dev); +void qpci_msix_set_entry(QPCIDevice *dev, uint16_t entry, + uint64_t guest_addr, uint32_t data); bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry); bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry); +void qpci_msix_set_masked(QPCIDevice *dev, uint16_t entry, bool masked); bool qpci_msix_test_interrupt(QPCIDevice *dev, uint16_t msix_entry, uint64_t msix_addr, uint32_t msix_data); uint16_t qpci_msix_table_size(QPCIDevice *dev); diff --git a/tests/qtest/libqos/virtio-pci.c b/tests/qtest/libqos/virtio-pci.c index ea8114e243..16e0220920 100644 --- a/tests/qtest/libqos/virtio-pci.c +++ b/tests/qtest/libqos/virtio-pci.c @@ -290,66 +290,28 @@ void qvirtio_pci_device_disable(QVirtioPCIDevice *d) void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci, QGuestAllocator *alloc, uint16_t entry) { - uint32_t control; - uint64_t off; - g_assert(d->pdev->msix_enabled); - off = d->pdev->msix_table_off + (entry * 16); - - g_assert_cmpint(entry, >=, 0); - g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev)); vqpci->msix_entry = entry; - vqpci->msix_addr = guest_alloc(alloc, 4); qtest_memset(d->pdev->bus->qts, vqpci->msix_addr, 0, 4); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_LOWER_ADDR, vqpci->msix_addr & ~0UL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_UPPER_ADDR, - (vqpci->msix_addr >> 32) & ~0UL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_DATA, vqpci->msix_data); - - control = qpci_io_readl(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_VECTOR_CTRL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_VECTOR_CTRL, - control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); + qpci_msix_set_entry(d->pdev, entry, vqpci->msix_addr, vqpci->msix_data); + qpci_msix_set_masked(d->pdev, entry, false); d->msix_ops->set_queue_vector(d, vqpci->vq.index, entry); } void qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d, QGuestAllocator *alloc, uint16_t entry) { - uint32_t control; - uint64_t off; - g_assert(d->pdev->msix_enabled); - off = d->pdev->msix_table_off + (entry * 16); - - g_assert_cmpint(entry, >=, 0); - g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev)); d->config_msix_entry = entry; - d->config_msix_data = 0x12345678; d->config_msix_addr = guest_alloc(alloc, 4); qtest_memset(d->pdev->bus->qts, d->config_msix_addr, 0, 4); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_LOWER_ADDR, d->config_msix_addr & ~0UL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_UPPER_ADDR, - (d->config_msix_addr >> 32) & ~0UL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_DATA, d->config_msix_data); - - control = qpci_io_readl(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_VECTOR_CTRL); - qpci_io_writel(d->pdev, d->pdev->msix_table_bar, - off + PCI_MSIX_ENTRY_VECTOR_CTRL, - control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); - + qpci_msix_set_entry(d->pdev, entry, d->config_msix_addr, + d->config_msix_data); + qpci_msix_set_masked(d->pdev, entry, false); d->msix_ops->set_config_vector(d, entry); } -- 2.55.0
