accel_cpu_register_type() creates the abstract parent accel-<cpu type>. A subclass names that parent, and type_initialize() aborts when the parent is missing. The old type_init registered only target_cpu_type(), which is one name in a multi-target process. Call the helper from the CPU type init of each target that has an AccelCPU subclass.
ARM calls it because whpx-common.c parents accel-arm-cpu on aarch64-softmmu. i386 calls it for TCG, KVM, HVF, NVMM, and MSHV. i386-softmmu and x86_64-softmmu each pass their own CPU_RESOLVING_TYPE, so WHPX on x86_64-softmmu finds accel-x86_64-cpu. RISC-V calls it for TCG and KVM. PowerPC calls it for KVM. Other targets have no AccelCPU subclass. Machine init looks up tcg-accel-<cpu type> or kvm-accel-<cpu type> and skips a missing class, so those targets do not need the parent. No extra tests is needed, as these QOM types already be tested by the existing logic instantiating all QOM types. Signed-off-by: Yonggang Luo <[email protected]> --- accel/accel-common.c | 6 ++---- include/accel/accel-cpu.h | 2 ++ target/arm/cpu.c | 2 ++ target/i386/cpu.c | 2 ++ target/ppc/cpu_init.c | 2 ++ target/riscv/cpu.c | 8 ++++++++ 6 files changed, 18 insertions(+), 4 deletions(-) diff --git a/accel/accel-common.c b/accel/accel-common.c index 00a400243f..441d1b77fa 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -130,9 +130,9 @@ static const TypeInfo accel_types[] = { DEFINE_TYPES(accel_types) -static void register_accel_target_type(void) +void accel_cpu_register_type(const char *cpu_type) { - g_autofree char *name = g_strconcat("accel-", target_cpu_type(), NULL); + g_autofree char *name = g_strconcat("accel-", cpu_type, NULL); const TypeInfo accel_cpu_type = { .name = name, .parent = TYPE_OBJECT, @@ -142,5 +142,3 @@ static void register_accel_target_type(void) type_register_static(&accel_cpu_type); } - -type_init(register_accel_target_type); diff --git a/include/accel/accel-cpu.h b/include/accel/accel-cpu.h index 9e7eede7c3..2fdb64d2ae 100644 --- a/include/accel/accel-cpu.h +++ b/include/accel/accel-cpu.h @@ -20,4 +20,6 @@ typedef struct AccelCPUClass { bool (*cpu_target_realize)(CPUState *cpu, Error **errp); } AccelCPUClass; +void accel_cpu_register_type(const char *cpu_type); + #endif /* ACCEL_CPU_H */ diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 71681447b2..725f1f3a5f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "qapi/error.h" #include "cpu.h" +#include "accel/accel-cpu.h" #ifdef CONFIG_TCG #include "exec/translation-block.h" #include "accel/tcg/cpu-ops.h" @@ -2753,6 +2754,7 @@ static const TypeInfo arm_cpu_type_info = { static void arm_cpu_register_types(void) { + accel_cpu_register_type(CPU_RESOLVING_TYPE); type_register_static(&arm_cpu_type_info); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index eab0d5a4d4..31b09e6f8e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -23,6 +23,7 @@ #include "qemu/qemu-print.h" #include "qemu/hw-version.h" #include "cpu.h" +#include "accel/accel-cpu.h" #include "tcg/helper-tcg.h" #include "exec/translation-block.h" #include "system/hvf.h" @@ -11093,6 +11094,7 @@ static void x86_cpu_register_types(void) { int i; + accel_cpu_register_type(CPU_RESOLVING_TYPE); type_register_static(&x86_cpu_type_info); for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { x86_register_cpudef_types(&builtin_x86_defs[i]); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 7f3036d903..fe3f2549b7 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -43,6 +43,7 @@ #include "exec/page-protection.h" #include "exec/watchpoint.h" #include "helper_regs.h" +#include "accel/accel-cpu.h" #include "internal.h" #include "spr_common.h" #include "power8-pmu.h" @@ -7589,6 +7590,7 @@ static const TypeInfo ppc_vhyp_type_info = { static void ppc_cpu_register_types(void) { + accel_cpu_register_type(CPU_RESOLVING_TYPE); type_register_static(&ppc_cpu_type_info); #ifndef CONFIG_USER_ONLY type_register_static(&ppc_vhyp_type_info); diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 362e561809..10e24f20e8 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -25,6 +25,7 @@ #include "qemu/guest-random.h" #include "qemu/atomic.h" #include "cpu.h" +#include "accel/accel-cpu.h" #include "cpu_vendorid.h" #include "target/riscv/tcg/csr.h" #include "internals.h" @@ -3931,3 +3932,10 @@ static const TypeInfo riscv_cpu_type_infos[] = { }; DEFINE_TYPES(riscv_cpu_type_infos) + +static void riscv_accel_cpu_register_type(void) +{ + accel_cpu_register_type(CPU_RESOLVING_TYPE); +} + +type_init(riscv_accel_cpu_register_type) -- 2.55.0.windows.3
