For the ARM_FEATURE_V6 case, it seems like we retrieve AP and XN bits in
get_phys_addr_v6() but we don't check the XN bit in get_S1prot().
Change the `else if (arm_feature(env, ARM_FEATURE_V7))` check in
get_S1prot() to plain `else`.
Fixes: d8e052b3876356 ("target-arm: get_phys_addr_lpae: more xn control")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4367
Signed-off-by: Manos Pitsidianakis <[email protected]>
---
Changes in v2:
- Change else if to plain else (thanks Peter)
- Link to v1:
https://lore.kernel.org/qemu-devel/[email protected]
---
target/arm/ptw.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index
2e67d02493bd463cfd2d31ecf1316272ac3f1d99..e36d2ff9383914d565af54a868943d705405d34c
100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -1595,7 +1595,7 @@ static int get_S1prot(CPUARMState *env, ARMMMUIdx
mmu_idx, bool is_aa64,
if (regime_has_2_ranges(mmu_idx) && !is_user) {
xn = pxn || (user_rw & PAGE_WRITE);
}
- } else if (arm_feature(env, ARM_FEATURE_V7)) {
+ } else {
switch (regime_el(mmu_idx)) {
case 1:
case 3:
@@ -1613,8 +1613,6 @@ static int get_S1prot(CPUARMState *env, ARMMMUIdx
mmu_idx, bool is_aa64,
case 2:
break;
}
- } else {
- xn = wxn = 0;
}
if (xn || (wxn && (prot_rw & PAGE_WRITE))) {
---
base-commit: f29ccc287a6cfdd51d3a4fd17fbe9af3310a0ac5
change-id: 20261105-armv6-xn-check-ebdd507ca5ab
Best regards,
--
Manos Pitsidianakis <[email protected]>
