The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwa...@petalogix.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
---
changed from v4:
removed redundant braces
changed from v3:
fixed indentation
tweaked commit msg
hw/xilinx_zynq.c | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7e6c273..a7feabe 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -130,6 +130,16 @@ static void zynq_init(ram_addr_t ram_size, const char
*boot_device,
}
}
+ dev = qdev_create(NULL, "sdhci");
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xE0100000);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[56-IRQ_OFFSET]);
+
+ dev = qdev_create(NULL, "sdhci");
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0xE0101000);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[79-IRQ_OFFSET]);
+
zynq_binfo.ram_size = ram_size;
zynq_binfo.kernel_filename = kernel_filename;
zynq_binfo.kernel_cmdline = kernel_cmdline;
--
1.7.0.4
