On Tue, Aug 21, 2012 at 11:17:40AM +0100, Peter Maydell wrote:
> On 21 August 2012 11:05, Daniel P. Berrange <berra...@redhat.com> wrote:
> > On Mon, Aug 20, 2012 at 04:48:24PM -0500, Anthony Liguori wrote:
> >> "bits" is really ambiguous.  What it means in QEMU (specifically the
> >> value you are returning) is probably not what you expect it to mean.
> >
> > My intent was to indicate the pointer word size for the architecture.
> > eg 64 for x86_64, ppc64, etc, and 32 and i686, ppc, etc. Probably
> > should have called it 'wordsize' or something like that
> 
> This is not the same as the physical address size...
> 
> > Hmm, when I looked at the header in my checkout it already
> > *is* 64 or 32 as I'd expect for the architecture in question.
> >
> > $ grep PHYS_ADDR_BITS */config-target.mak
> > alpha-softmmu/config-target.mak:TARGET_PHYS_ADDR_BITS=64
> > arm-softmmu/config-target.mak:TARGET_PHYS_ADDR_BITS=64
> 
> ...eg for ARM we have a 32 bit pointer size but 40 bit physical
> addresses (on some cores) and we set TARGET_PHYS_ADDR_BITS
> to 64 in all cases.
> 
> > i386-softmmu/config-target.mak:TARGET_PHYS_ADDR_BITS=64
> 
> i386 is the other obvious "pointers are 32 bit but we
> set TARGET_PHYS_ADDR_BITS wider", for about the same reasons.

Ok, so I'll just respin this patch & remove the 'bits' field entirely
so we avoid the confusion.

Daniel
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