On Fri, Mar 30, 2012 at 01:16:36PM -0400, Richard Henderson wrote: > We've already eliminated both base and index being zero. > --- > target-mips/translate.c | 3 +-- > 1 files changed, 1 insertions(+), 2 deletions(-) > > diff --git a/target-mips/translate.c b/target-mips/translate.c > index a663b74..300d95e 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -7742,8 +7742,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t > opc, > } else if (index == 0) { > gen_load_gpr(t0, base); > } else { > - gen_load_gpr(t0, index); > - gen_op_addr_add(ctx, t0, cpu_gpr[base], t0); > + gen_op_addr_add(ctx, t0, cpu_gpr[base], cpu_gpr[index]); > } > /* Don't do NOP if destination is zero: we must perform the actual > memory access. */
Thanks, applied. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net