On 10/13/07, J. Mayer <[EMAIL PROTECTED]> wrote: > On Sat, 2007-10-13 at 13:47 +0300, Blue Swirl wrote: > > On 10/13/07, J. Mayer <[EMAIL PROTECTED]> wrote: > > > The problem: > > > some CPU architectures, namely PowerPC and maybe others, offers > > > facilities to access the memory or I/O in the reverse endianness, ie > > > little-endian instead of big-endian for PowerPC, or provide instruction > > > to make memory accesses in the "reverse-endian". This is implemented as > > > a global flag on some CPU. This case is already handled by the PowerPC > > > emulation but is is far from being optimal. Some other implementations > > > allow the OS to store an "reverse-endian" flag in the TLB or the segment > > > descriptors, thus providing per-page or per-segment endianness control. > > > This is mostly used to ease driver migration from a PC platform to > > > PowerPC without taking any care of the device endianness in the driver > > > code (yes, this is bad...). > > > > Nice, this may be useful for Sparc64. It has a global CPU flag for > > endianness, individual pages can be marked as reverse endian, and > > finally there are instructions that access memory in reverse endian. > > The end result is a XOR of all these reverses. Though I don't know if > > any of these features are used at all. > > I realized that I/O accesses for reverse-endian pages were not correct > in the softmmu_template.h header. This new version fixes this. It also > remove duplicated code in the case of unaligned accesses in a > reverse-endian page.
I think 64 bit access case is not handled correctly, but to solve that it would be nice to extend the current IO access system to 64 bits.