On Wed, Sep 26, 2012 at 03:05:18AM +0400, Max Filippov wrote: > On Wed, Sep 26, 2012 at 2:57 AM, Aurelien Jarno <aurel...@aurel32.net> wrote: > > Now that and with 0xff, 0xffff and 0xffffffff is optimized in > > tcg/tcg-op.h, there is no need to do it in target-xtensa/translate.c. > > > > Cc: Max Filippov <jcmvb...@gmail.com> > > Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> > > --- > > target-xtensa/translate.c | 15 +-------------- > > 1 file changed, 1 insertion(+), 14 deletions(-) > > > > diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c > > index ba3ffcb..c1358ee 100644 > > --- a/target-xtensa/translate.c > > +++ b/target-xtensa/translate.c > > @@ -1835,20 +1835,7 @@ static void disas_xtensa_insn(DisasContext *dc) > > } else { > > tcg_gen_mov_i32(tmp, cpu_R[RRR_T]); > > } > > I guess shri above may be de-optimized as well. > In any case Acked-by: Max Filippov <jcmvb...@gmail.com>
Good catch, I looked for some patterns in the targets code, and didn't see this one. I'll send an updated patch. > > - > > - switch (maskimm) { > > - case 0xff: > > - tcg_gen_ext8u_i32(cpu_R[RRR_R], tmp); > > - break; > > - > > - case 0xffff: > > - tcg_gen_ext16u_i32(cpu_R[RRR_R], tmp); > > - break; > > - > > - default: > > - tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); > > - break; > > - } > > + tcg_gen_andi_i32(cpu_R[RRR_R], tmp, maskimm); > > tcg_temp_free(tmp); > > } > > break; > > -- > > 1.7.10.4 > > > > > > -- > Thanks. > -- Max > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net