On Thu, 2007-11-01 at 23:13 +0100, J. Mayer wrote:
> On Thu, 2007-11-01 at 21:53 +0200, Blue Swirl wrote:
> > On 11/1/07, Blue Swirl <[EMAIL PROTECTED]> wrote:
> > > On 10/29/07, Jocelyn Mayer <[EMAIL PROTECTED]> wrote:
> > > > CVSROOT: /sources/qemu
> > > > Module name: qemu
> > > > Changes by: Jocelyn Mayer <j_mayer> 07/10/28 23:42:18
> > > >
> > > > Modified files:
> > > > . : Makefile.target vl.h
> > > > hw : cuda.c grackle_pci.c heathrow_pic.c ppc.c
> > > > ppc_chrp.c ppc_prep.c
> > > > Added files:
> > > > hw : mac_dbdma.c mac_nvram.c macio.c ppc_mac.h
> > > > ppc_oldworld.c
> > > >
> > > > Log message:
> > > > * sort the PowerPC target object files
> > > > * make PowerPC NVRAM accessors generic to be able to use a
> > > > MacIO NVRAM
> > > > instead of the M48T59 one
> > > > * split PowerMac targets code:
> > > > - move all PowerMac related definitions and prototypes into
> > > > hw/ppc_mac.h
> > > > - add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c
> > > > which implements shared PowerMac devices
> > > > - define the g3bw machine in a new hw/ppc_oldworld.c file
> > > > * Fix the g3bw target:
> > > > - fix the Grackle host PCI device
> > > > - connect the Heathrow PIC to the PowerPC 6xx bus pins
> > > >
> > > > CVSWeb URLs:
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/Makefile.target?cvsroot=qemu&r1=1.212&r2=1.213
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/vl.h?cvsroot=qemu&r1=1.280&r2=1.281
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/cuda.c?cvsroot=qemu&r1=1.16&r2=1.17
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/grackle_pci.c?cvsroot=qemu&r1=1.6&r2=1.7
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/heathrow_pic.c?cvsroot=qemu&r1=1.5&r2=1.6
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ppc.c?cvsroot=qemu&r1=1.34&r2=1.35
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ppc_chrp.c?cvsroot=qemu&r1=1.44&r2=1.45
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ppc_prep.c?cvsroot=qemu&r1=1.47&r2=1.48
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mac_dbdma.c?cvsroot=qemu&rev=1.1
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mac_nvram.c?cvsroot=qemu&rev=1.1
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/macio.c?cvsroot=qemu&rev=1.1
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ppc_mac.h?cvsroot=qemu&rev=1.1
> > > > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ppc_oldworld.c?cvsroot=qemu&rev=1.1
> > >
> > > You broke sparc64-softmmu build with this patch.
>
> I am missing something ? I rebuilt all available targets before
> commiting... but I now see sparc64-softmmu seems not to be in the
> available targets, which could explain I cannot check if it compiles or
> not... As it been removed by mistake ?
>
> > I think the best solution to fix this is to put the nvram helpers to
> > m48t59.h as inline functions instead of duplicating the code in
> > several places.
>
> You mean the NVRAM_set / get_xxx ? I was to remove the definitions from
> vl.h, I have to say, because those are supposed to be PowerPC (in fact
> OpenHack'Ware) related hacks.
> Those functions will never go in m48t59.h as they are not related with
> m48t59. Apple machine don't have such a device (even if Qemu pretend it
> has, this is to be removed in the days to come) but need those functions
> to pass arguments to the firmware. What I needed to do (and that what I
> did commit) is make those routines independant from m48t59 so I can
> remove this device from ppc_chrp.c and ppc_oldworld.c and use the real
> Mac nvram instead (but ppc_prep.c still uses m48t59...).
>
> Whatever, I'll try to fix the sparc64 case as I broke it (if I found the
> code ;-) ).
This patch seems to fix the Sparc64 compilation. I cannot test that it
works, but the PowerPC counterparts is OK. I also fixed a bug in the
NVRAM_set_string function.
Tell me what you feel about it, if you're OK, I'll commit it.
This code could be shared, but it should be independant of the NVRAM
model implementation. As I would not like to put this code in vl.c,
maybe we need a c file in the hw subdirectory to put those kind of
functions, which are part of the hw library but hardware implementation
independant...
--
J. Mayer <[EMAIL PROTECTED]>
Never organized
Index: vl.h
===================================================================
RCS file: /sources/qemu/qemu/vl.h,v
retrieving revision 1.285
diff -u -d -d -p -r1.285 vl.h
--- vl.h 31 Oct 2007 01:54:03 -0000 1.285
+++ vl.h 1 Nov 2007 22:38:37 -0000
@@ -1328,6 +1328,16 @@ typedef struct nvram_t {
nvram_write_t write_fn;
} nvram_t;
+static inline uint32_t nvram_ll_read (nvram_t *nvram, uint32_t addr)
+{
+ return (*nvram->read_fn)(nvram->opaque, addr);;
+}
+
+static inline void nvram_ll_write (nvram_t *nvram, uint32_t addr, uint32_t val)
+{
+ (*nvram->write_fn)(nvram->opaque, addr, val);
+}
+
#include "hw/m48t59.h"
void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value);
Index: hw/ppc.c
===================================================================
RCS file: /sources/qemu/qemu/hw/ppc.c,v
retrieving revision 1.36
diff -u -d -d -p -r1.36 ppc.c
--- hw/ppc.c 29 Oct 2007 10:22:57 -0000 1.36
+++ hw/ppc.c 1 Nov 2007 22:38:37 -0000
@@ -1243,58 +1243,48 @@ void PPC_debug_write (void *opaque, uint
/*****************************************************************************/
/* NVRAM helpers */
-static inline uint32_t nvram_read (nvram_t *nvram, uint32_t addr)
-{
- return (*nvram->read_fn)(nvram->opaque, addr);;
-}
-
-static inline void nvram_write (nvram_t *nvram, uint32_t addr, uint32_t val)
-{
- (*nvram->write_fn)(nvram->opaque, addr, val);
-}
-
void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value)
{
- nvram_write(nvram, addr, value);
+ nvram_ll_write(nvram, addr, value);
}
uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr)
{
- return nvram_read(nvram, addr);
+ return nvram_ll_read(nvram, addr);
}
void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value)
{
- nvram_write(nvram, addr, value >> 8);
- nvram_write(nvram, addr + 1, value & 0xFF);
+ nvram_ll_write(nvram, addr, value >> 8);
+ nvram_ll_write(nvram, addr + 1, value & 0xFF);
}
uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr)
{
uint16_t tmp;
- tmp = nvram_read(nvram, addr) << 8;
- tmp |= nvram_read(nvram, addr + 1);
+ tmp = nvram_ll_read(nvram, addr) << 8;
+ tmp |= nvram_ll_read(nvram, addr + 1);
return tmp;
}
void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value)
{
- nvram_write(nvram, addr, value >> 24);
- nvram_write(nvram, addr + 1, (value >> 16) & 0xFF);
- nvram_write(nvram, addr + 2, (value >> 8) & 0xFF);
- nvram_write(nvram, addr + 3, value & 0xFF);
+ nvram_ll_write(nvram, addr, value >> 24);
+ nvram_ll_write(nvram, addr + 1, (value >> 16) & 0xFF);
+ nvram_ll_write(nvram, addr + 2, (value >> 8) & 0xFF);
+ nvram_ll_write(nvram, addr + 3, value & 0xFF);
}
uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr)
{
uint32_t tmp;
- tmp = nvram_read(nvram, addr) << 24;
- tmp |= nvram_read(nvram, addr + 1) << 16;
- tmp |= nvram_read(nvram, addr + 2) << 8;
- tmp |= nvram_read(nvram, addr + 3);
+ tmp = nvram_ll_read(nvram, addr) << 24;
+ tmp |= nvram_ll_read(nvram, addr + 1) << 16;
+ tmp |= nvram_ll_read(nvram, addr + 2) << 8;
+ tmp |= nvram_ll_read(nvram, addr + 3);
return tmp;
}
@@ -1305,10 +1295,11 @@ void NVRAM_set_string (nvram_t *nvram, u
int i;
for (i = 0; i < max && str[i] != '\0'; i++) {
- nvram_write(nvram, addr + i, str[i]);
+ nvram_ll_write(nvram, addr + i, str[i]);
}
- nvram_write(nvram, addr + i, str[i]);
- nvram_write(nvram, addr + max - 1, '\0');
+ if (i == max)
+ i = max - 1;
+ nvram_ll_write(nvram, addr + i, '\0');
}
int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max)
Index: hw/sun4u.c
===================================================================
RCS file: /sources/qemu/qemu/hw/sun4u.c,v
retrieving revision 1.24
diff -u -d -d -p -r1.24 sun4u.c
--- hw/sun4u.c 31 Oct 2007 01:54:04 -0000 1.24
+++ hw/sun4u.c 1 Nov 2007 22:38:37 -0000
@@ -67,64 +67,66 @@ void DMA_register_channel (int nchan,
}
/* NVRAM helpers */
-void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value)
+void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value)
{
- m48t59_write(nvram, addr, value);
+ nvram_ll_write(nvram, addr, value);
}
-uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr)
+uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr)
{
- return m48t59_read(nvram, addr);
+ return nvram_ll_read(nvram, addr);
}
-void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value)
+void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value)
{
- m48t59_write(nvram, addr, value >> 8);
- m48t59_write(nvram, addr + 1, value & 0xFF);
+ nvram_ll_write(nvram, addr, value >> 8);
+ nvram_ll_write(nvram, addr + 1, value & 0xFF);
}
-uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr)
+uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr)
{
uint16_t tmp;
- tmp = m48t59_read(nvram, addr) << 8;
- tmp |= m48t59_read(nvram, addr + 1);
+ tmp = nvram_ll_read(nvram, addr) << 8;
+ tmp |= nvram_ll_read(nvram, addr + 1);
return tmp;
}
-void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value)
+void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value)
{
- m48t59_write(nvram, addr, value >> 24);
- m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF);
- m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF);
- m48t59_write(nvram, addr + 3, value & 0xFF);
+ nvram_ll_write(nvram, addr, value >> 24);
+ nvram_ll_write(nvram, addr + 1, (value >> 16) & 0xFF);
+ nvram_ll_write(nvram, addr + 2, (value >> 8) & 0xFF);
+ nvram_ll_write(nvram, addr + 3, value & 0xFF);
}
-uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr)
+uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr)
{
uint32_t tmp;
- tmp = m48t59_read(nvram, addr) << 24;
- tmp |= m48t59_read(nvram, addr + 1) << 16;
- tmp |= m48t59_read(nvram, addr + 2) << 8;
- tmp |= m48t59_read(nvram, addr + 3);
+ tmp = nvram_ll_read(nvram, addr) << 24;
+ tmp |= nvram_ll_read(nvram, addr + 1) << 16;
+ tmp |= nvram_ll_read(nvram, addr + 2) << 8;
+ tmp |= nvram_ll_read(nvram, addr + 3);
return tmp;
}
-void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
+void NVRAM_set_string (nvram_t *nvram, uint32_t addr,
const unsigned char *str, uint32_t max)
{
int i;
for (i = 0; i < max && str[i] != '\0'; i++) {
- m48t59_write(nvram, addr + i, str[i]);
+ nvram_ll_write(nvram, addr + i, str[i]);
}
- m48t59_write(nvram, addr + max - 1, '\0');
+ if (i == max)
+ i = max - 1;
+ nvram_ll_write(nvram, addr + i, '\0');
}
-int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max)
+int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max)
{
int i;
@@ -153,7 +155,7 @@ static uint16_t NVRAM_crc_update (uint16
return tmp;
}
-uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count)
+uint16_t NVRAM_compute_crc (nvram_t *nvram, uint32_t start, uint32_t count)
{
uint32_t i;
uint16_t crc = 0xFFFF;
@@ -171,7 +173,7 @@ uint16_t NVRAM_compute_crc (m48t59_t *nv
return crc;
}
-static uint32_t nvram_set_var (m48t59_t *nvram, uint32_t addr,
+static uint32_t nvram_set_var (nvram_t *nvram, uint32_t addr,
const unsigned char *str)
{
uint32_t len;
@@ -182,26 +184,26 @@ static uint32_t nvram_set_var (m48t59_t
return addr + len;
}
-static void nvram_finish_partition (m48t59_t *nvram, uint32_t start,
+static void nvram_finish_partition (nvram_t *nvram, uint32_t start,
uint32_t end)
{
unsigned int i, sum;
// Length divided by 16
- m48t59_write(nvram, start + 2, ((end - start) >> 12) & 0xff);
- m48t59_write(nvram, start + 3, ((end - start) >> 4) & 0xff);
+ nvram_ll_write(nvram, start + 2, ((end - start) >> 12) & 0xff);
+ nvram_ll_write(nvram, start + 3, ((end - start) >> 4) & 0xff);
// Checksum
- sum = m48t59_read(nvram, start);
+ sum = nvram_ll_read(nvram, start);
for (i = 0; i < 14; i++) {
- sum += m48t59_read(nvram, start + 2 + i);
+ sum += nvram_ll_read(nvram, start + 2 + i);
sum = (sum + ((sum & 0xff00) >> 8)) & 0xff;
}
- m48t59_write(nvram, start + 1, sum & 0xff);
+ nvram_ll_write(nvram, start + 1, sum & 0xff);
}
extern int nographic;
-int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
+int sun4u_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size,
const unsigned char *arch,
uint32_t RAM_size, int boot_device,
uint32_t kernel_image, uint32_t kernel_size,
@@ -246,20 +248,20 @@ int sun4u_NVRAM_set_params (m48t59_t *nv
// OpenBIOS nvram variables
// Variable partition
start = 256;
- m48t59_write(nvram, start, 0x70);
+ nvram_ll_write(nvram, start, 0x70);
NVRAM_set_string(nvram, start + 4, "system", 12);
end = start + 16;
for (i = 0; i < nb_prom_envs; i++)
end = nvram_set_var(nvram, end, prom_envs[i]);
- m48t59_write(nvram, end++ , 0);
+ nvram_ll_write(nvram, end++ , 0);
end = start + ((end - start + 15) & ~15);
nvram_finish_partition(nvram, start, end);
// free partition
start = end;
- m48t59_write(nvram, start, 0x7f);
+ nvram_ll_write(nvram, start, 0x7f);
NVRAM_set_string(nvram, start + 4, "free", 12);
end = 0x1fd0;
@@ -338,6 +340,7 @@ static void sun4u_init(int ram_size, int
{
CPUState *env;
char buf[1024];
+ nvram_t nvr;
m48t59_t *nvram;
int ret, linux_boot;
unsigned int i;
@@ -456,7 +459,10 @@ static void sun4u_init(int ram_size, int
i8042_init(NULL/*1*/, NULL/*12*/, 0x60);
floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd_table);
nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59);
- sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_device[0],
+ nvr.opaque = nvram;
+ nvr.read_fn = &m48t59_read;
+ nvr.write_fn = &m48t59_write;
+ sun4u_NVRAM_set_params(&nvr, NVRAM_SIZE, "Sun4u", ram_size, boot_device[0],
KERNEL_LOAD_ADDR, kernel_size,
kernel_cmdline,
INITRD_LOAD_ADDR, initrd_size,
