This series reworks the SSI bus framework for SPI and add some new SPI controllers and devices:
Patches 1-4 reworks SSI to add chip-select support to SPI devices and allow for multiple SPI devices attached to the same bus. Patch 5 fixes the SPI setup in the stellaris machine model. Patch 6 is a general FIFO helper API used by the upcomming patches. Patch 7 is a device model for the m25p80 SPI flash family. Patches 8 & 10 are the Xilinx SPI flash controller devices Patches 9 & 11 add SPI controllers to the ML605 and Zynq machine models. Patch 12 is Maintainerships. Patch 13 Is a helper function that can SSI controllers can call to automatically connect slave (based on QOM object heirachy) CHANGELOG: changed from v8: Addressed PMM review Dropped stellaris GPIO rework patch and fixed stellaris GPIO split logic Documented FIFO interface. Fixed VMSD irq setting on load changed from v7: addressed PMM review (p5) various minor bugfixes Added connect children helper changed from v6: Address Blue Swirl Review (P8, P11) changed from v5: VMSD version bump various line-by-line review fixes removed trivial patch (formerly P8) collapsed former P2-3 into one patch for bisectability changed from v4 (Major changes): Completely reworked SPI refactor. Please re-review from scratch. Added Zynq SPI flash. Factored out FIFO functionality from SPI flash controller. changed from v3: addressed reviewer comments from P Maydell and S Hajnoczi added patch 5 (re Paul Brooks request) changed from v2: folded former SPI bus functionality into existing SSI infrastructure (suggested - Paul Brook) (all patches) made m25p80 use async io (suggested - Stefan Hajnoczi) (2/4) instantiated two spi flashes instead of one in ml605 ref design (4/4) changed from v1: minor sylistic changes (1/4) converted spi api to modified txrx style (1-3/4) heavily refactored m25p80 model (2/4) Peter A. G. Crosthwaite (12): ssi: Support for multiple attached devices ssi: Implemented CS behaviour ssi: Added create_slave_no_init() qdev: allow multiple qdev_init_gpio_in() calls stellaris: Removed SSI mux hw: Added generic FIFO API. m25p80: Initial implementation of SPI flash device xilinx_spi: Initial impl. of Xilinx SPI controller petalogix-ml605: added SPI controller with n25q128 xilinx_spips: Xilinx Zynq SPI cntrlr device model xilinx_zynq: Added SPI controllers + flashes MAINTAINERS: Added maintainerships for SSI Peter Crosthwaite (1): ssi: Add slave autoconnect helper MAINTAINERS | 8 + default-configs/arm-softmmu.mak | 1 + default-configs/microblaze-softmmu.mak | 2 + default-configs/microblazeel-softmmu.mak | 2 + hw/Makefile.objs | 2 + hw/ads7846.c | 7 +- hw/arm/Makefile.objs | 1 + hw/fifo.c | 78 ++++ hw/fifo.h | 99 +++++ hw/irq.c | 27 +- hw/irq.h | 11 +- hw/m25p80.c | 600 ++++++++++++++++++++++++++++++ hw/max111x.c | 7 +- hw/microblaze/Makefile.objs | 1 + hw/petalogix_ml605_mmu.c | 27 ++ hw/qdev.c | 6 +- hw/spitz.c | 8 +- hw/ssd0323.c | 7 + hw/ssi-sd.c | 7 + hw/ssi.c | 109 +++++- hw/ssi.h | 42 ++ hw/stellaris.c | 93 +---- hw/xilinx_spi.c | 385 +++++++++++++++++++ hw/xilinx_spips.c | 354 ++++++++++++++++++ hw/xilinx_zynq.c | 34 ++ hw/z2.c | 7 +- 26 files changed, 1810 insertions(+), 115 deletions(-) create mode 100644 hw/fifo.c create mode 100644 hw/fifo.h create mode 100644 hw/m25p80.c create mode 100644 hw/xilinx_spi.c create mode 100644 hw/xilinx_spips.c
