[Qemu-devel] [PATCH 07/14] pc port92: convert PIO to new memory api read/write

[Alexander Graf]

Signed-off-by: Alexander Graf <ag...@suse.de>
---
 hw/pc.c |   19 +++++++++++--------
 1 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 7e7e0e2..9eb1230 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -422,7 +422,8 @@ typedef struct Port92State {
     qemu_irq *a20_out;
 } Port92State;
 
-static void port92_write(void *opaque, uint32_t addr, uint32_t val)
+static void port92_write(void *opaque, target_phys_addr_t addr, uint64_t val,
+                         unsigned size)
 {
     Port92State *s = opaque;
 
@@ -434,7 +435,8 @@ static void port92_write(void *opaque, uint32_t addr, 
uint32_t val)
     }
 }
 
-static uint32_t port92_read(void *opaque, uint32_t addr)
+static uint64_t port92_read(void *opaque, target_phys_addr_t addr,
+                            unsigned size)
 {
     Port92State *s = opaque;
     uint32_t ret;
@@ -469,13 +471,14 @@ static void port92_reset(DeviceState *d)
     s->outport &= ~1;
 }
 
-static const MemoryRegionPortio port92_portio[] = {
-    { 0, 1, 1, .read = port92_read, .write = port92_write },
-    PORTIO_END_OF_LIST(),
-};
-
 static const MemoryRegionOps port92_ops = {
-    .old_portio = port92_portio
+    .read = port92_read,
+    .write = port92_write,
+    .impl = {
+        .min_access_size = 1,
+        .max_access_size = 1,
+    },
+    .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static int port92_initfn(ISADevice *dev)
-- 
1.6.0.2