Hi, Qemu bits for q35 support, I'm posting the seabios changes separately. The patches require '-M pc_q35' and -L 'seabios dir with q35 changes' on the qemu command line. Hopefully, we can make it the default for x86 at some future point when we feel comfortable with it.
Since q35 patches have been posted before I've tried to keep the authorship as clear as possible. The current patches have been tested with basic install testing and memory testing on f16, f17, windows 7 and windows 8. They can be run on the various BSD flavors by adding a 'piix4-ide' device to the pci bus. ie: -device piix4-ide. I've dropped the ahci migration bits, which means q35 is not migratable at the moment. I simply haven't had time to make them more complete yet. I'm hoping that we'll come to some agreement on the minimal functionality required for q35 to be merged. Git trees: git://github.com/jibaron/q35-qemu.git git://github.com/jibaron/q35-seabios.git todo: -add ahci migration back (need to cover more fields, but basically works) -add base addr for hpet in LPC device (for osx per agraf) -convert hotplug to use MemoryRegionPortio for hotplug (need an IsaDevice?) Thanks, -Jason Changes from v1: -Updated end of low mem from 0xe0000000 -> 0xb0000000 (Gerd Hoffmann) -so 0xb000000-0xc000000 is memconfig -0xc000000-0xfec00000 is 32-bit pci window -style/various cleanups -introduced IF_AHCI -introduced mach_if -split dsdt out of bios, now passed for piix4 as well (Paolo, Gerd) -Removed add opaque argument to pci_map_irq_fn (Michael S. Tsirkin) -removed patches that were merged in v1 Isaku Yamahata (7): pci: pci capability must be in PCI space pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle pc, pc_piix: split out pc nic initialization pc/piix_pci: factor out smram/pam logic pci_ids: add intel 82801BA pci-to-pci bridge id and PCI_CLASS_SERIAL_SMBUS q35: Introduce q35 pc based chipset emulator q35: Fix irr initialization for slots 25..31 Jan Kiszka (5): pci: Add class 0xc05 as 'SMBus' q35: Suppress SMM BIOS initialization under KVM q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic q35: smbus: Remove PCI_STATUS_SIG_SYSTEM_ERROR and PCI_STATUS_DETECTED_PARITY from w1cmask q35: Add kvmclock support Jason Baron (9): blockdev: Introduce a default machine blockdev interface field, QEMUMachine->mach_if blockdev: Introduce IF_AHCI pc: Move ioapic_init() from pc_piix.c to pc.c pcie: pass pcie window size to pcie_host_mmcfg_update() pcie: Convert PCIExpressHost to use the QOM. q35: Re-base q35 Add a fallback bios file search, if -L fails. q35: automatically load the q35 dsdt table q35: add acpi-based pci hotplug. blockdev.c | 17 +- blockdev.h | 21 ++ hw/acpi_ich9.c | 492 +++++++++++++++++++++++++ hw/acpi_ich9.h | 57 +++ hw/boards.h | 2 +- hw/device-hotplug.c | 2 +- hw/highbank.c | 2 +- hw/i386/Makefile.objs | 2 + hw/ide.h | 6 + hw/ide/ahci.c | 18 + hw/ide/core.c | 23 +- hw/leon3.c | 2 +- hw/mips_jazz.c | 4 +- hw/pam.c | 120 ++++++ hw/pam.h | 98 +++++ hw/pc.c | 58 +++ hw/pc.h | 7 + hw/pc_piix.c | 45 +-- hw/pc_q35.c | 459 ++++++++++++++++++++++++ hw/pc_sysfw.c | 2 +- hw/pci.c | 24 ++- hw/pci.h | 2 + hw/pci_ids.h | 16 + hw/pcie_host.c | 35 ++- hw/pcie_host.h | 12 +- hw/piix_pci.c | 65 +--- hw/puv3.c | 2 +- hw/q35.c | 956 +++++++++++++++++++++++++++++++++++++++++++++++++ hw/q35.h | 356 ++++++++++++++++++ hw/q35_smbus.c | 166 +++++++++ hw/realview.c | 6 +- hw/spapr.c | 2 +- hw/sun4m.c | 24 +- hw/versatilepb.c | 4 +- hw/vexpress.c | 4 +- hw/xilinx_zynq.c | 2 +- vl.c | 56 ++- 37 files changed, 3008 insertions(+), 161 deletions(-) create mode 100644 hw/acpi_ich9.c create mode 100644 hw/acpi_ich9.h create mode 100644 hw/pam.c create mode 100644 hw/pam.h create mode 100644 hw/pc_q35.c create mode 100644 hw/q35.c create mode 100644 hw/q35.h create mode 100644 hw/q35_smbus.c