On 10/06/2012 05:30 AM, Paolo Bonzini wrote: > +static inline void gen_setcc1(DisasContext *s, int b, TCGv reg) > { > + int inv, jcc_op, size, cond; > + TCGv t0; > + > + inv = b & 1; > jcc_op = (b >> 1) & 7; > + > switch(s->cc_op) { > + /* we optimize relational operators for the cmp/jcc case */ > case CC_OP_SUBB: > case CC_OP_SUBW: > case CC_OP_SUBL: > case CC_OP_SUBQ: > + size = s->cc_op - CC_OP_SUBB; > + switch(jcc_op) { > + case JCC_BE: > + cond = inv ? TCG_COND_GTU : TCG_COND_LEU; > + tcg_gen_add_tl(cpu_tmp4, cpu_cc_dst, cpu_cc_src); > + gen_extu(size, cpu_tmp4); > + t0 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false); > + tcg_gen_setcond_tl(cond, reg, cpu_tmp4, t0); > + break;
I don't think this patch is going in the right direction. In particular, this is going to be largely redundant with gen_jcc1. Instead, c.f. the DisasCompare structure now present in target-sparc/, or a similar DisasCompare structure present in my jumbo target-s390x patch set. Here we use common code to generate a comparison, which can then be fed into brcond, setcond, or movcond as desired. I think that this Compare structure should be fed to gen_compute_eflags_* so that a parent gen_condition routine can make use of them for simple conditions like z/nz. At which point gen_jcc1 and gen_setcc1 become fairly trivial routines. r~