On 12 October 2012 07:53, Andre Beckus <mikemail98-q...@yahoo.com> wrote: > As a case study, the STM32 does have a reference clock. It is simply > the system clock divided by 8 (maybe not ARM's intention for it to be > tied so closely to the system clock). The documentation says the TENMS > field is hardwired to 9000, which corresponds to a 1 ms period when the > external reference clock is selected and the system clock is running at > 72 Mhz. So, the TENMS field will not be accurate if the system clock is > running at a different frequency (the SKEW bit is hardwired to 1).
OK, so the board needs to be able to separately set all of: * TENMS calibration field * system clock * reference clock > Looking at the big picture, it seems that QEMU could benefit from a new > "clock line" type for handling clock signals. They could be exposed by > devices in a similar manner to GPIO lines (there would be both input and > output clock lines). I could see them being useful (at least in the > microcontroller world) for passing clock signals back and forth between > peripherals, interfacing timer peripherals to machines, setting > oscillator frequencies, and serving as the plumbing for clock trees. I > know I had to do a lot of hacking with the STM32 implementation to > propagate the clock controller's signals to the other peripherals. > > When I searched on the topic, I saw that you discussed/requested a > common clock framework back in July (in regards to the an exynos4210 > patch). Do you know if any progress was made? I haven't seen anything since then... I agree that a 'clock line' connection might be useful. -- PMM
