Daniel Jacobowitz wrote: > On Thu, Nov 08, 2007 at 12:05:25AM +0100, Aurelien Jarno wrote: > > Has Thiemo already said, there is no IEEE behavior. If you look at the > > IEEE 754 document you will see that it has requirements on what should > > be supported by an IEEE compliant FPU, but has very few requirements on > > the implementation. > > If folks don't like the target conditionals there, I recommend we just > set some low bit to be sure it's a NaN and move on.
I disagree. I chose on purpose the format recommended in the MIPS architecture specification. The general format seems to be commonly preferred beyond the MIPS world. > The softfloat > implementation is not all that close to matching any one hardware FPU. At least for MIPS I expect it to be close enough to real hardware. Thiemo