On 19 October 2012 07:40, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote: > Add the pl353 memory controller with both NAND and parallel flashes > attached. > > Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > --- > > hw/xilinx_zynq.c | 49 +++++++++++++++++++++++++++++++++++++++++-------- > 1 files changed, 41 insertions(+), 8 deletions(-) > > diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c > index fd46ba2..7f6faf0 100644 > --- a/hw/xilinx_zynq.c > +++ b/hw/xilinx_zynq.c > @@ -120,14 +120,47 @@ static void zynq_init(ram_addr_t ram_size, const char > *boot_device, > vmstate_register_ram_global(ocm_ram); > memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram); > > - DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0); > - > - /* AMD */ > - pflash_cfi02_register(0xe2000000, NULL, "zynq.pflash", FLASH_SIZE, > - dinfo ? dinfo->bdrv : NULL, FLASH_SECTOR_SIZE, > - FLASH_SIZE/FLASH_SECTOR_SIZE, 1, > - 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, > - 0); > + /* pl353 */ > + dev = qdev_create(NULL, "arm.pl35x"); > + /* FIXME: handle this somewhere central */ > + object_property_add_child(container_get(qdev_get_machine(), > "/unattached"), > + "pl353", OBJECT(dev), NULL);
So, er, what's this for? Whatever it is, as you say it needs to be done properly, not randomly in the board model... -- PMM
