The following patch fixes the problem that DMA transfers are not performed when
the DCSR_STOPINTR bit is set.
--
Thorsten
Index: hw/pxa2xx_dma.c
===================================================================
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c
--- hw/pxa2xx_dma.c 11 Nov 2007 19:47:58 -0000 1.5
+++ hw/pxa2xx_dma.c 15 Nov 2007 09:28:22 -0000
@@ -186,7 +186,8 @@
s->running = 1;
for (c = 0; c < s->channels; c ++) {
ch = &s->chan[c];
-
+
+ ch->state &= ~DCSR_STOPINTR;
while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) {
/* Test for pending requests */
if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)
