On 2012-11-02 15:53, Paolo Bonzini wrote: > Il 30/10/2012 19:21, Jan Kiszka ha scritto: >>>> Aren't we still dependent on the order of processing? If the APIC is >>>> restored after the device, won't we get the same problem? >>> >>> Strictly speaking yes, but CPUs and APICs are always the first devices >>> to be saved. >> Hmm, thinking about this again: Why is the MSI event injected at all >> during restore, specifically while the device models are in transitional >> state. Can you explain this? > > Because the (virtio-serial) port was connected on the source and > disconnected on the destination, or vice versa. > > In my simplified reproducer, I'm really using different command-lines on > the source and destination, but it is not necessary. For example, if > you have a socket backend, the destination will usually be disconnected > at the time the machine loads. > > One alternative fix is a vm_clock timer that expires immediately. It > would fix both MSI and INTx, on the other hand I thought it was an APIC > bug because the QEMU APIC works nicely.
I think deferring IRQ events to the point when the complete vmstate is loaded is the cleaner and more robust approach. Jan -- Siemens AG, Corporate Technology, CT RTC ITP SDP-DE Corporate Competence Center Embedded Linux
