Will,
1. Please check CPUID before using ADJUST_TSC MSR, exit test successfully
if CPUID bit disabled.
2. Please test the implementation of ADJUST_TSC MSR (functional test).
vmexit.flat test can be used for performance of MSR emulation.
Example
tsc1 = rdtsc();
wrmsr(IA32_TSC_ADJUST, 100000000000ull);
tsc2 = rdtsc();
if (tsc2 - tsc1 < 100000000000ull) {
printf("failure ... should be ...");
failure++;
}
...
write to tsc
check if IA32_TSC_ADJUST is adjusted accordingly
return !failure ? 0 : 1;
Thanks
On Mon, Nov 26, 2012 at 10:44:14AM -0800, Will Auld wrote:
> Signed-off-by: Will Auld <will.a...@intel.com>
> ---
> config-x86-common.mak | 5 ++++-
> x86/tsc_adjust.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 47 insertions(+), 1 deletion(-)
> create mode 100644 x86/tsc_adjust.c
>
> diff --git a/config-x86-common.mak b/config-x86-common.mak
> index c76cd11..47a9056 100644
> --- a/config-x86-common.mak
> +++ b/config-x86-common.mak
> @@ -34,7 +34,8 @@ tests-common = $(TEST_DIR)/vmexit.flat $(TEST_DIR)/tsc.flat
> \
> $(TEST_DIR)/realmode.flat $(TEST_DIR)/msr.flat \
> $(TEST_DIR)/hypercall.flat $(TEST_DIR)/sieve.flat \
> $(TEST_DIR)/kvmclock_test.flat $(TEST_DIR)/eventinj.flat \
> - $(TEST_DIR)/s3.flat $(TEST_DIR)/pmu.flat
> $(TEST_DIR)/asyncpf.flat
> + $(TEST_DIR)/s3.flat $(TEST_DIR)/pmu.flat \
> + $(TEST_DIR)/tsc_adjust.flat $(TEST_DIR)/asyncpf.flat
>
> ifdef API
> tests-common += api/api-sample
> @@ -64,6 +65,8 @@ $(TEST_DIR)/port80.elf: $(cstart.o) $(TEST_DIR)/port80.o
>
> $(TEST_DIR)/tsc.elf: $(cstart.o) $(TEST_DIR)/tsc.o
>
> +$(TEST_DIR)/tsc_adjust.elf: $(cstart.o) $(TEST_DIR)/tsc_adjust.o
> +
> $(TEST_DIR)/apic.elf: $(cstart.o) $(TEST_DIR)/apic.o
>
> $(TEST_DIR)/realmode.elf: $(TEST_DIR)/realmode.o
> diff --git a/x86/tsc_adjust.c b/x86/tsc_adjust.c
> new file mode 100644
> index 0000000..bcb8982
> --- /dev/null
> +++ b/x86/tsc_adjust.c
> @@ -0,0 +1,43 @@
> +#include "libcflat.h"
> +#include "processor.h"
> +
> +#define IA32_TSC_ADJUST 0x3b
> +
> +int main()
> +{
> + u64 t1, t2, t3, t4, t5;
> + u64 lat;
> +
> + t3 = 0x0;
> +
> + t1 = rdtsc();
> + wrmsr(IA32_TSC_ADJUST, t3);
> + t2 = rdtsc();
> + lat = t2 - t1;
> + printf("rdtsc/wrmsr/rdtsc latency %lld\n", lat);
> + printf("Initial rdtsc: %lld\n", t2);
> +
> + t1 = rdmsr(IA32_TSC_ADJUST);
> + printf("Initial rdmsr IA32_TSC_ADJUST: %lld\n", t1);
> +
> + t5 = 100000000000ull;
> + wrtsc(t5);
> + t1 = rdmsr(IA32_TSC_ADJUST);
> + printf("wrtsc %lld, rdmsr IA32_TSC_ADJUST: %lld\n", t5, t1);
> +
> + wrmsr(IA32_TSC_ADJUST, t3);
> + t2 = rdtsc();
> + t1 = rdmsr(IA32_TSC_ADJUST);
> + printf( "wrmsr IA32_TSC_ADJUST %lld, rdmsr IA32_TSC_ADJUST: %lld,
> rdtsc: %lld\n", t3, t1, t2);
> +
> + t3 = 0xffff;
> + t4 = rdtsc();
> + wrmsr(IA32_TSC_ADJUST, t3);
> + t2 = rdtsc();
> + t1 = rdmsr(IA32_TSC_ADJUST);
> + printf( "wrmsr IA32_TSC_ADJUST %lld, rdmsr IA32_TSC_ADJUST: %lld,
> rdtsc: %lld\n", t3, t1, t2);
> + lat = t2 - t4;
> + printf("rdtsc/wrmsr/rdtsc latency %lld\n", lat);
> +
> + return 0;
> +}
> --
> 1.8.0.rc0
>
>
>
> --
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