On 11/30/07, Paul Brook <[EMAIL PROTECTED]> wrote:
> > I think T2 may need to store host addresses as well. To be frank, I
> > don't understand that part  but there is a compiler warning on a 64
> > bit host.
>
> If you're thinking of the warnings in op_goto_tb0, these are actually due to
> tb->tb_next having the wrong type.

I meant this one (target-sparc/op_helper.c):
            if (tb) {
                /* the PC is inside the translated code. It means that we have
                   a virtual CPU fault */
                cpu_restore_state(tb, env, pc, (void *)T2);
            }

> > > In general all access to target memory should be via
> > > cpu_physcial_memory_{rw,read,write}
> > >
> > > For performance reasons we currently make an exception for framebuffer
> > > devices and allow them to access ram directly. ram_addr_t holds an offset
> > > from phys_ram_base.
> >
> > Even better would be to make separate device memory access functions
> > and hide this exception.
>
> cpu_physical_memory_* are the device memory access functions.

I meant a function to access memory from the device side, the effect
is of course identical on IOMMU-less system.


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