The patch below changes the float and double types into float32 and and float64 types in the PPC code. This doesn't change anything when using softfloat-native as the types are the same, but that helps compiling the PPC target with softfloat.
Index: target-ppc/op_helper.c =================================================================== RCS file: /sources/qemu/qemu/target-ppc/op_helper.c,v retrieving revision 1.73 diff -u -d -p -r1.73 op_helper.c --- target-ppc/op_helper.c 24 Nov 2007 02:03:55 -0000 1.73 +++ target-ppc/op_helper.c 30 Dec 2007 15:12:42 -0000 @@ -467,7 +467,7 @@ static always_inline int fpisneg (float6 return u.u >> 63 != 0; } -static always_inline int isden (float f) +static always_inline int isden (float64 f) { union { float64 f; @@ -989,7 +993,7 @@ void do_fdiv (void) void do_fctiw (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1014,7 +1018,7 @@ void do_fctiw (void) void do_fctiwz (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1040,7 +1044,7 @@ void do_fctiwz (void) void do_fcfid (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1051,7 +1055,7 @@ void do_fcfid (void) void do_fctid (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1070,7 +1074,7 @@ void do_fctid (void) void do_fctidz (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1268,7 +1272,7 @@ void do_fsqrt (void) void do_fre (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1300,7 +1304,7 @@ void do_fre (void) void do_fres (void) { union { - double d; + float64 d; uint64_t i; } p; @@ -1337,7 +1341,7 @@ void do_fres (void) void do_frsqrte (void) { union { - double d; + float64 d; uint64_t i; } p; Index: target-ppc/op_helper_mem.h =================================================================== RCS file: /sources/qemu/qemu/target-ppc/op_helper_mem.h,v retrieving revision 1.16 diff -u -d -p -r1.16 op_helper_mem.h --- target-ppc/op_helper_mem.h 22 Nov 2007 11:00:46 -0000 1.16 +++ target-ppc/op_helper_mem.h 30 Dec 2007 15:12:42 -0000 @@ -316,10 +316,10 @@ void glue(do_POWER2_lfq, MEMSUFFIX) (voi FT1 = glue(ldfq, MEMSUFFIX)((uint32_t)(T0 + 4)); } -static always_inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA) +static always_inline float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA) { union { - double d; + float64 d; uint64_t u; } u; @@ -341,10 +341,10 @@ void glue(do_POWER2_stfq, MEMSUFFIX) (vo glue(stfq, MEMSUFFIX)((uint32_t)(T0 + 4), FT1); } -static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) +static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d) { union { - double d; + float64 d; uint64_t u; } u; Index: target-ppc/op_mem.h =================================================================== RCS file: /sources/qemu/qemu/target-ppc/op_mem.h,v retrieving revision 1.27 diff -u -d -p -r1.27 op_mem.h --- target-ppc/op_mem.h 22 Nov 2007 11:00:46 -0000 1.27 +++ target-ppc/op_mem.h 30 Dec 2007 15:12:42 -0000 @@ -267,7 +267,7 @@ void OPPROTO glue(glue(glue(op_st, name) } #endif -static always_inline void glue(stfs, MEMSUFFIX) (target_ulong EA, double d) +static always_inline void glue(stfs, MEMSUFFIX) (target_ulong EA, float64 d) { glue(stfl, MEMSUFFIX)(EA, float64_to_float32(d, &env->fp_status)); } @@ -279,10 +279,10 @@ static always_inline void glue(stfs, MEM #define WORD0 1 #define WORD1 0 #endif -static always_inline void glue(stfiw, MEMSUFFIX) (target_ulong EA, double d) +static always_inline void glue(stfiw, MEMSUFFIX) (target_ulong EA, float64 d) { union { - double d; + float64 d; uint32_t u[2]; } u; @@ -302,10 +302,10 @@ PPC_STF_OP_64(fs, stfs); PPC_STF_OP_64(fiw, stfiw); #endif -static always_inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) +void glue(stfqr, MEMSUFFIX) (target_ulong EA, float64 d) { union { - double d; + float64 d; uint64_t u; } u; @@ -314,10 +314,10 @@ static always_inline void glue(stfqr, ME glue(stfq, MEMSUFFIX)(EA, u.d); } -static always_inline void glue(stfsr, MEMSUFFIX) (target_ulong EA, double d) +void glue(stfsr, MEMSUFFIX) (target_ulong EA, float64 d) { union { - float f; + float32 f; uint32_t u; } u; @@ -326,10 +326,10 @@ static always_inline void glue(stfsr, ME glue(stfl, MEMSUFFIX)(EA, u.f); } -static always_inline void glue(stfiwr, MEMSUFFIX) (target_ulong EA, double d) +void glue(stfiwr, MEMSUFFIX) (target_ulong EA, float64 d) { union { - double d; + float64 d; uint64_t u; } u; @@ -365,7 +365,7 @@ void OPPROTO glue(glue(glue(op_l, name), } #endif -static always_inline double glue(ldfs, MEMSUFFIX) (target_ulong EA) +float64 glue(ldfs, MEMSUFFIX) (target_ulong EA) { return float32_to_float64(glue(ldfl, MEMSUFFIX)(EA), &env->fp_status); } @@ -377,10 +377,10 @@ PPC_LDF_OP_64(fd, ldfq); PPC_LDF_OP_64(fs, ldfs); #endif -static always_inline double glue(ldfqr, MEMSUFFIX) (target_ulong EA) +float64 glue(ldfqr, MEMSUFFIX) (target_ulong EA) { union { - double d; + float64 d; uint64_t u; } u; @@ -390,10 +390,10 @@ static always_inline double glue(ldfqr, return u.d; } -static always_inline double glue(ldfsr, MEMSUFFIX) (target_ulong EA) +float64 glue(ldfsr, MEMSUFFIX) (target_ulong EA) { union { - float f; + float32 f; uint32_t u; } u; -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' [EMAIL PROTECTED] | [EMAIL PROTECTED] `- people.debian.org/~aurel32 | www.aurel32.net