On 1/2/08, Brian Johnson <[EMAIL PROTECTED]> wrote: > Robert Reif wrote: > > Paul Brook wrote: > >> > >> Couldn't you just latch the value when one half is accessed? > >> > > In this one specific case you could do that but this is not the only > > case in sparc32 (TOD, MXCC, ...) and other architectures with 64 bit > > hardware have similar requirements. > > > > This is a generic solution that fills a hole in the qemu > > implementation. > > Agreed. Some non-PC hardware has 64-bit registers which need to be > accessed as 64-bit quantities, in order to read or write all fields at > once. Qemu should support 64-bit I/O.
On Sparc64 many registers can only be handled using 64 bit accesses, other methods should raise an exception.
