On 03/01/2013 12:32 PM, Peter Maydell wrote: > On 1 March 2013 11:21, Fabien Chouteau <chout...@adacore.com> wrote: >> TMS570LS31x/21x Technical Reference Manual: >> >> "The TMS570 family is based on the ARM® CortexTM-R4F core. ARM has >> designed this core to be used in big-endian and little-endian systems. >> For the TI TMS570 family, the endianness has been configured to BE32." > > That is confusing, because ARM's R4F Technical Reference Manual > says "The processor does not support word-invariant big-endianness > (BE)-32"... > > (http://translatedcode.wordpress.com/2012/04/02/this-end-up/ > has a quick summary of what the various flavours of ARM > endianness actually mean.) >
Confusing indeed. It seems that the documentation is not reliable. Below the text I just quoted, there's an example showing that TMS570 is actually BE8. And this is confirmed by our experience using the real board. > I think you're going to have to run some tests on the actual > hardware to find out what it really does. Specifically, what > are the values of SCTLR.IE, SCTLR.EE and CPSR.E when you think > you're in big-endian mode? (We need to sort out what parts of > the behaviour you're seeing are the CPU itself and what parts > are the SoC/board doing endianness flipping externally to the > CPU.) > SCTLR.IE and SCTLR.EE are both set to 1 at reset and the values cannot be changed. BTW, our run-time works both on QEMU and a real-board, that's also why I'm confident that there are no endianness issue. Regards, -- Fabien Chouteau
