On 03/04/2013 02:30 PM, Paul Brook wrote: >>>> "The bytes with the register are transmitted in target byte order." >>>> >>>> /* Aliases for Q regs. */ >>>> nregs += 16; >>>> if (reg < nregs) { >>>> >>>> - stfq_le_p(buf, env->vfp.regs[(reg - 32) * 2]); >>>> - stfq_le_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]); >>>> + stfq_p(buf, env->vfp.regs[(reg - 32) * 2]); >>>> + stfq_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]); >>> >>> This is wrong. You're still using little-endian ordering of words. >> >> Can you explain a little bit further? If I'm in big-endian mode, stfq_p() >> will be stfq_be_p(), right? > > Because we're actually storing two halves of a 128-bit value. You still > store the least significant half first. >
Right, I'm sorry I didn't see you comment was only about the Q registers. What would be the solution then? #ifdef TARGET_WORDS_BIGENDIAN stfq_p(buf, env->vfp.regs[(reg - 32) * 2 + 1]); stfq_p(buf + 8, env->vfp.regs[(reg - 32) * 2]); #else stfq_p(buf, env->vfp.regs[(reg - 32) * 2]); stfq_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]); #endif /* TARGET_WORDS_BIGENDIAN */ Regards, -- Fabien Chouteau