On Mon, Apr 22, 2013 at 03:11:19PM +1000, peter.crosthwa...@xilinx.com wrote: > From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > > Updates to the Zynq SPI controller. Some QOMifying cleanup, followed by > a number of bugs/incompletnesses found by some (very) rigourous test > vectors.
Hi Peter, The series looks good to me. Once you fix the build issues Peter Maydell noticed, feel free to add my Reviewed-by tag. Cheers, Edgar > > changed from v3: > Fixed break after goto (PMM review) > > > Peter Crosthwaite (15): > xilinx_spips: seperate SPI and QSPI as two classes > xilinx_spips: Make interrupts clear on read > xilinx_spips: Inhibit interrupts in LQSPI mode > xilinx_spips: Add verbose LQSPI debug output > xilinx_spips: Fix QSPI FIFO size > xilinx_spips: Trash LQ page cache on mode change > xilinx_spips: Add automatic start support > xilinx_spips: Implement automatic CS > xilinx_spips: lqspi: Dont touch config register > xilinx_spips: Fix CTRL register RW bits > xilinx_spips: Fix striping behaviour > xilinx_spips: Debug msgs for Snoop state > xilinx_spips: Multiple debug verbosity levels > xilinx_spips: lqspi: Push more data to tx-fifo > xilinx_spips: lqspi: Fix byte/misaligned access > > hw/arm/xilinx_zynq.c | 2 +- > hw/ssi/xilinx_spips.c | 320 > ++++++++++++++++++++++++++++++++++++++----------- > 2 files changed, 249 insertions(+), 73 deletions(-) >
