Hi list,
there's been a lot of discussion about abstraction of hardware devices
and machine description.
Last Saturday I've been running into some developers from the
University of Erlangen (FAU) who work on an x86 emulator, used to
simulate machine failures (memory bit flips, hard drive failures) [1].
The most interesting part of their project appears to be the hardware
abstraction layer. So in the general discussion of creating a generic
machine description, it might be a good idea to get them to contribute
their experience to Qemu :-). Maybe we can learn about dead ends and
unexplored alternatives from them.
FAUmachine guys, it would be awesome if you could either point us to a
thorough documentation of the device abstraction layers or give some
overview in a reply to this email.
Alex
[1] http://www.faumachine.org
