On 16 September 2013 16:34, Sebastian Huber <sebastian.hu...@embedded-brains.de> wrote: > it would be really nice to get the CP15 VBAR support integrated. This > allows unit test suites of single address space real-time systems to catch > NULL pointer read/write access for example.
I agree it would be useful. As I said, it needs thought about whether it makes sense to add it. > The ARM documentation says that this is a banked register that is only > present in an implementation that includes the Security Extensions. Is this > equivalent to having TrustZone? Yes; the ARM ARM uses the term "Security Extensions" but this is interchangeable with TrustZone. > In the ID_PFR1, Processor Feature Register 1, the bits [4:7] indicate if a > particular CPU has this feature. Is it possible to use this register to > determine the availability of the VBAR register in Qemu? This may avoid > adding a new enum arm_features. Unfortunately QEMU tends to not pass the right values in the PFRs: we usually report what the real h/w CPU has even if we don't implement everything. In any case a new arm_features bit is hardly a big deal: the actual question is whether it makes sense to provide this register that shouldn't really exist for the cpu configurations we're modelling. -- PMM
