On 10/25/2013 09:25 AM, Tom Musta wrote: > > I tried recoding xsmaddadp using float64_muladd. The problem that I hit is > the > boundary case where the intermediate product and the summand are infinities of > the opposite sign. This is the case handled by the first "if" in the code > snippet above. PowerPC has a dedicated FPSCR bit for this type of condition > (VXISI) as well as a general invalid operation bit (VX). As far as I can > tell, > the softfloat code only has the equivalent of the VX bit. Thus the > implementation > that I proposed is a more accurate representation of the Power ISA. > > The VSX code was modeled after the existing fmadd FPU instruction. I suspect > the author of that code wrote it this way for similar reasons. > > I am inclined to keep my proposed implementation, which is consistent with > the existing PowerPC code. > > Thoughts?
Hmm. I won't object to your current implementation, since it does produce correct results. I believe that a better implementation could use float*_muladd, and check the result for float_flag_invalid. If set, compute the intermediate product so you can figure out the VXISI setting. But we'd expect that to be an unlikely path. r~