Signed-off-by: liguang <lig.f...@cn.fujitsu.com> --- hw/arm/sunxi-soc.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/hw/arm/sunxi-soc.c b/hw/arm/sunxi-soc.c index 960539a..0338e03 100644 --- a/hw/arm/sunxi-soc.c +++ b/hw/arm/sunxi-soc.c @@ -4,6 +4,9 @@ #include "hw/arm/arm.h" #include "hw/ptimer.h" #include "sysemu/sysemu.h" +#include "exec/address-spaces.h" +#include "hw/char/serial.h" + #define TYPE_SUNXI_PIC "sunxi_PIC" @@ -505,8 +508,75 @@ static const TypeInfo sunxi_pit_info = { .class_init = sunxi_pit_class_init, }; +#define SUNXI_PIC_REG_BASE 0x01c20400 +#define SUNXI_PIT_REG_BASE 0x01c20c00 +#define SUNXI_UART0_REG_BASE 0x01c28000 + +static struct arm_boot_info sunxi_binfo = { + .loader_start = 0x48000000, + .board_id = 0x1623, +}; + static void sunxi_init(QEMUMachineInitArgs *args) { + ram_addr_t ram_size = args->ram_size; + const char *cpu_model = args->cpu_model; + const char *kernel_filename = args->kernel_filename; + const char *kernel_cmdline = args->kernel_cmdline; + ARMCPU *cpu; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *ram_alias = g_new(MemoryRegion, 1); + qemu_irq pic[95]; + DeviceState *dev; + uint8_t i; + + /*here we currently support sunxi-4i*/ + cpu_model = "cortex-a8"; + cpu = cpu_arm_init(cpu_model); + if (!cpu) { + fprintf(stderr, "Unable to find CPU definition\n"); + exit(1); + } + + memory_region_init_ram(ram, NULL, "sunxi-soc.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size); + memory_region_add_subregion(address_space_mem, 0x40000000, ram_alias); + + dev = sysbus_create_varargs(TYPE_SUNXI_PIC, SUNXI_PIC_REG_BASE, + qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ), + qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ), + NULL); + for (i = 0; i < 95; i++) { + pic[i] = qdev_get_gpio_in(dev, i); + } + + sysbus_create_varargs(TYPE_SUNXI_PIT, SUNXI_PIT_REG_BASE, pic[22], pic[23], + pic[24], pic[25], pic[67], pic[68], NULL); + + serial_mm_init(address_space_mem, SUNXI_UART0_REG_BASE, 2, pic[1], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); +/* + serial_mm_init(address_space_mem, SUNXI_UART1_REG_BASE, 2, pic[2], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART2_REG_BASE, 2, pic[3], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART3_REG_BASE, 2, pic[4], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART4_REG_BASE, 2, pic[17], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART5_REG_BASE, 2, pic[18], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART6_REG_BASE, 2, pic[19], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); + serial_mm_init(address_space_mem, SUNXI_UART7_REG_BASE, 2, pic[20], 115200, + serial_hds[0], DEVICE_NATIVE_ENDIAN); +*/ + sunxi_binfo.ram_size = ram_size; + sunxi_binfo.kernel_filename = kernel_filename; + sunxi_binfo.kernel_cmdline = kernel_cmdline; + arm_load_kernel(cpu, &sunxi_binfo); } static QEMUMachine sunxi_machine = { @@ -524,6 +594,8 @@ machine_init(sunxi_machine_init); static void sunxi_register_types(void) { + type_register_static(&sunxi_pic_info); + type_register_static(&sunxi_pit_info); } type_init(sunxi_register_types); -- 1.7.2.5